Home
last modified time | relevance | path

Searched refs:timing_row (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init.h84 unsigned timing_row; member
Ddmc_init_ddr3.c128 writel(mem->timing_row, &dmc->timingrow); in ddr3_mem_ctrl_init()
609 writel(mem->timing_row, &drex0->timingrow0); in ddr3_mem_ctrl_init()
610 writel(mem->timing_row, &drex1->timingrow0); in ddr3_mem_ctrl_init()
Dclock_init_exynos5.c189 .timing_row = 0x6836650f,
292 .timing_row = 0x8c36650e,
395 .timing_row = 0x8c36650e,