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/external/libaom/libaom/test/
Dlpf_test.cc179 uint8_t tmp = GetOuterThresh(&rnd); \
181 blimit[16]) = { tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp, \
182 tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp }; \
183 tmp = GetInnerThresh(&rnd); \
185 limit[16]) = { tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp, \
186 tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp }; \
187 tmp = GetHevThresh(&rnd); \
189 thresh[16]) = { tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp, \
190 tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp }; \
221 uint8_t tmp = GetOuterThresh(&rnd); \
[all …]
/external/javaparser/javaparser-core/src/main/java/com/github/javaparser/ast/visitor/
DGenericListVisitorAdapter.java50 List<R> tmp; in visit() local
52 tmp = n.getMembers().accept(this, arg); in visit()
53 if (tmp != null) in visit()
54 result.addAll(tmp); in visit()
57 tmp = n.getName().accept(this, arg); in visit()
58 if (tmp != null) in visit()
59 result.addAll(tmp); in visit()
62 tmp = n.getAnnotations().accept(this, arg); in visit()
63 if (tmp != null) in visit()
64 result.addAll(tmp); in visit()
[all …]
/external/libvpx/libvpx/test/
Dlpf_test.cc178 uint8_t tmp = GetOuterThresh(&rnd); in TEST_P() local
180 blimit[16]) = { tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp, in TEST_P()
181 tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp }; in TEST_P()
182 tmp = GetInnerThresh(&rnd); in TEST_P()
184 limit[16]) = { tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp, in TEST_P()
185 tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp }; in TEST_P()
186 tmp = GetHevThresh(&rnd); in TEST_P()
188 thresh[16]) = { tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp, in TEST_P()
189 tmp, tmp, tmp, tmp, tmp, tmp, tmp, tmp }; in TEST_P()
237 uint8_t tmp = GetOuterThresh(&rnd); in TEST_P() local
[all …]
/external/u-boot/arch/arm/mach-uniphier/clk/
Dpll-ld4.c17 u32 tmp, clk_mode_upll, clk_mode_axosel; in upll_init() local
19 tmp = readl(SG_PINMON0); in upll_init()
20 clk_mode_upll = tmp & SG_PINMON0_CLK_MODE_UPLLSRC_MASK; in upll_init()
21 clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK; in upll_init()
24 tmp = readl(SC_UPLLCTRL); in upll_init()
25 tmp &= ~0x18000000; in upll_init()
26 writel(tmp, SC_UPLLCTRL); in upll_init()
32 tmp &= ~0x07ffffff; in upll_init()
33 tmp |= 0x0228f5c0; in upll_init()
36 tmp &= ~0x07ffffff; in upll_init()
[all …]
Dpll-pro4.c17 u32 tmp, clk_mode_axosel; in vpll_init() local
20 tmp = readl(SG_PINMON0); in vpll_init()
21 clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK; in vpll_init()
29 tmp = readl(SC_VPLL27ACTRL); in vpll_init()
30 tmp |= 0x00000001; in vpll_init()
31 writel(tmp, SC_VPLL27ACTRL); in vpll_init()
32 tmp = readl(SC_VPLL27BCTRL); in vpll_init()
33 tmp |= 0x00000001; in vpll_init()
34 writel(tmp, SC_VPLL27BCTRL); in vpll_init()
37 tmp = readl(SC_VPLL27ACTRL3); in vpll_init()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/
Dfast-ArrayOutOfBounds.ll6 ; CHECK-NEXT: %tmp.2 = fadd float %a3, %a4
7 ; CHECK-NEXT: %tmp.4 = fadd float %tmp.2, %a2
8 ; CHECK-NEXT: %tmp.6 = fadd float %tmp.4, %a1
9 ; CHECK-NEXT: %tmp.8 = fadd float %tmp.6, %a0
10 ; CHECK-NEXT: %tmp.11 = fadd float %a2, %a3
11 ; CHECK-NEXT: %tmp.13 = fadd float %tmp.11, %a1
12 ; CHECK-NEXT: %tmp.15 = fadd float %tmp.13, %a0
13 ; CHECK-NEXT: %tmp.18 = fadd float %a1, %a2
14 ; CHECK-NEXT: %tmp.20 = fadd float %tmp.18, %a0
15 ; CHECK-NEXT: %tmp.23 = fadd float %a0, %a1
[all …]
/external/llvm/test/Transforms/Reassociate/
Dfast-ArrayOutOfBounds.ll6 ; CHECK-NEXT: %tmp.2 = fadd float %a3, %a4
7 ; CHECK-NEXT: %tmp.4 = fadd float %tmp.2, %a2
8 ; CHECK-NEXT: %tmp.6 = fadd float %tmp.4, %a1
9 ; CHECK-NEXT: %tmp.8 = fadd float %tmp.6, %a0
10 ; CHECK-NEXT: %tmp.11 = fadd float %a2, %a3
11 ; CHECK-NEXT: %tmp.13 = fadd float %tmp.11, %a1
12 ; CHECK-NEXT: %tmp.15 = fadd float %tmp.13, %a0
13 ; CHECK-NEXT: %tmp.18 = fadd float %a1, %a2
14 ; CHECK-NEXT: %tmp.20 = fadd float %tmp.18, %a0
15 ; CHECK-NEXT: %tmp.23 = fadd float %a0, %a1
[all …]
/external/libevent/test/
Dregress.gen.c50 struct msg *tmp; in msg_new_with_arg() local
51 if ((tmp = malloc(sizeof(struct msg))) == NULL) { in msg_new_with_arg()
55 tmp->base = &msg_base__; in msg_new_with_arg()
57 tmp->from_name_data = NULL; in msg_new_with_arg()
58 tmp->from_name_set = 0; in msg_new_with_arg()
60 tmp->to_name_data = NULL; in msg_new_with_arg()
61 tmp->to_name_set = 0; in msg_new_with_arg()
63 tmp->attack_data = NULL; in msg_new_with_arg()
64 tmp->attack_set = 0; in msg_new_with_arg()
66 tmp->run_data = NULL; in msg_new_with_arg()
[all …]
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dmpc8536_serdes.c95 u32 tmp; in fsl_serdes_init() local
115 tmp = in_be32(sd + FSL_SRDSCR0_OFFS); in fsl_serdes_init()
116 tmp &= ~FSL_SRDSCR0_TXEQA_MASK; in fsl_serdes_init()
117 tmp |= FSL_SRDSCR0_TXEQA_SATA; in fsl_serdes_init()
118 tmp &= ~FSL_SRDSCR0_TXEQE_MASK; in fsl_serdes_init()
119 tmp |= FSL_SRDSCR0_TXEQE_SATA; in fsl_serdes_init()
120 out_be32(sd + FSL_SRDSCR0_OFFS, tmp); in fsl_serdes_init()
122 tmp = in_be32(sd + FSL_SRDSCR1_OFFS); in fsl_serdes_init()
123 tmp &= ~FSL_SRDSCR1_LANEA_MASK; in fsl_serdes_init()
124 tmp &= ~FSL_SRDSCR1_LANEE_MASK; in fsl_serdes_init()
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
D2003-05-28-ManyArgs.ll45 %tmp.101 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 4 ; <i8**> [#uses=1]
46 %tmp.105 = getelementptr [300 x i8]* %net_file, i64 0, i64 0 ; <i8*> [#uses=1]
47 %tmp.106 = getelementptr [300 x i8]* %arch_file, i64 0, i64 0 ; <i8*> [#uses=1]
48 %tmp.107 = getelementptr [300 x i8]* %place_file, i64 0, i64 0 ; <i8*> [#uses=1]
49 %tmp.108 = getelementptr [300 x i8]* %route_file, i64 0, i64 0 ; <i8*> [#uses=1]
50 …%tmp.109 = getelementptr { i32, float, float, float, float, float, float, float, float, float, flo…
51 %tmp.112 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 0 ; <i32*> [#uses=1]
52 %tmp.114 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 6 ; <i32*> [#uses=1]
53 %tmp.118 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 7 ; <i32*> [#uses=1]
54 %tmp.135 = load i32* %operation ; <i32> [#uses=1]
[all …]
/external/elfutils/tests/
Drun-addr2line-i-test.sh58 /tmp/x.cpp:5
62 /tmp/x.cpp:6
66 /tmp/x.cpp:10
70 /tmp/x.cpp:11
74 /tmp/x.cpp:5
75 /tmp/x.cpp:15
79 /tmp/x.cpp:10
80 /tmp/x.cpp:20
84 /tmp/x.cpp:5
85 /tmp/x.cpp:15
[all …]
/external/webrtc/webrtc/common_audio/signal_processing/
Dresample_fractional.c51 int32_t tmp; in WebRtcSpl_Resample48khzTo32khz() local
56 tmp = 1 << 14; in WebRtcSpl_Resample48khzTo32khz()
57 tmp += kCoefficients48To32[0][0] * In[0]; in WebRtcSpl_Resample48khzTo32khz()
58 tmp += kCoefficients48To32[0][1] * In[1]; in WebRtcSpl_Resample48khzTo32khz()
59 tmp += kCoefficients48To32[0][2] * In[2]; in WebRtcSpl_Resample48khzTo32khz()
60 tmp += kCoefficients48To32[0][3] * In[3]; in WebRtcSpl_Resample48khzTo32khz()
61 tmp += kCoefficients48To32[0][4] * In[4]; in WebRtcSpl_Resample48khzTo32khz()
62 tmp += kCoefficients48To32[0][5] * In[5]; in WebRtcSpl_Resample48khzTo32khz()
63 tmp += kCoefficients48To32[0][6] * In[6]; in WebRtcSpl_Resample48khzTo32khz()
64 tmp += kCoefficients48To32[0][7] * In[7]; in WebRtcSpl_Resample48khzTo32khz()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Generic/
D2003-05-28-ManyArgs.ll45 …%tmp.101 = getelementptr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 …
46 %tmp.105 = getelementptr [300 x i8], [300 x i8]* %net_file, i64 0, i64 0 ; <i8*> [#uses=1]
47 %tmp.106 = getelementptr [300 x i8], [300 x i8]* %arch_file, i64 0, i64 0 ; <i8*> [#uses=1]
48 %tmp.107 = getelementptr [300 x i8], [300 x i8]* %place_file, i64 0, i64 0 ; <i8*> [#uses=1]
49 %tmp.108 = getelementptr [300 x i8], [300 x i8]* %route_file, i64 0, i64 0 ; <i8*> [#uses=1]
50 …%tmp.109 = getelementptr { i32, float, float, float, float, float, float, float, float, float, flo…
51 …%tmp.112 = getelementptr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 …
52 …%tmp.114 = getelementptr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 …
53 …%tmp.118 = getelementptr %struct..s_router_opts, %struct..s_router_opts* %router_opts, i64 0, i32 …
54 %tmp.135 = load i32, i32* %operation ; <i32> [#uses=1]
[all …]
/external/llvm/test/CodeGen/Generic/
D2003-05-28-ManyArgs.ll45 …%tmp.101 = getelementptr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 …
46 %tmp.105 = getelementptr [300 x i8], [300 x i8]* %net_file, i64 0, i64 0 ; <i8*> [#uses=1]
47 %tmp.106 = getelementptr [300 x i8], [300 x i8]* %arch_file, i64 0, i64 0 ; <i8*> [#uses=1]
48 %tmp.107 = getelementptr [300 x i8], [300 x i8]* %place_file, i64 0, i64 0 ; <i8*> [#uses=1]
49 %tmp.108 = getelementptr [300 x i8], [300 x i8]* %route_file, i64 0, i64 0 ; <i8*> [#uses=1]
50 …%tmp.109 = getelementptr { i32, float, float, float, float, float, float, float, float, float, flo…
51 …%tmp.112 = getelementptr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 …
52 …%tmp.114 = getelementptr %struct..s_placer_opts, %struct..s_placer_opts* %placer_opts, i64 0, i32 …
53 …%tmp.118 = getelementptr %struct..s_router_opts, %struct..s_router_opts* %router_opts, i64 0, i32 …
54 %tmp.135 = load i32, i32* %operation ; <i32> [#uses=1]
[all …]
/external/libhevc/common/
Dihevc_trans_macros.h39 …LWORD64 tmp; …
53tmp = (LWORD64)(abs(inp)); …
54tmp = tmp * (quant_coeff); …
55tmp = tmp + (((LWORD64)q_add) << (q_bits - QUANT_ROUND_FACTOR_Q)); …
56tmp = tmp >> q_bits; …
58tmp = tmp * sign; …
59 …out = (WORD16) CLIP_S16(tmp); …
64 …LWORD64 tmp; …
78tmp = (LWORD64)(abs(inp)); …
79tmp = tmp * (quant_coeff); …
[all …]
/external/wpa_supplicant_8/src/common/
Dsae.c41 struct sae_temporary_data *tmp; in sae_set_group() local
49 tmp = sae->tmp = os_zalloc(sizeof(*tmp)); in sae_set_group()
50 if (tmp == NULL) in sae_set_group()
54 tmp->ec = crypto_ec_init(group); in sae_set_group()
55 if (tmp->ec) { in sae_set_group()
59 tmp->prime_len = crypto_ec_prime_len(tmp->ec); in sae_set_group()
60 tmp->prime = crypto_ec_get_prime(tmp->ec); in sae_set_group()
61 tmp->order = crypto_ec_get_order(tmp->ec); in sae_set_group()
66 tmp->dh = dh_groups_get(group); in sae_set_group()
67 if (tmp->dh) { in sae_set_group()
[all …]
/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dserdes.c48 u32 tmp; in fsl_setup_serdes() local
53 tmp = in_be32(regs + FSL_SRDSCR0_OFFS); in fsl_setup_serdes()
54 tmp &= ~FSL_SRDSCR0_DPP_1V2; in fsl_setup_serdes()
55 out_be32(regs + FSL_SRDSCR0_OFFS, tmp); in fsl_setup_serdes()
58 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
59 tmp &= ~FSL_SRDSCR2_VDD_1V2; in fsl_setup_serdes()
60 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
67 tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS); in fsl_setup_serdes()
68 tmp |= FSL_SRDSRSTCTL_SATA_RESET; in fsl_setup_serdes()
69 out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); in fsl_setup_serdes()
[all …]
/external/llvm/test/CodeGen/PowerPC/
Drlwimi.ll7 %tmp.3 = shl i32 %x, 16 ; <i32> [#uses=1]
8 %tmp.7 = and i32 %y, 65535 ; <i32> [#uses=1]
9 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
10 ret i32 %tmp.9
15 %tmp.7 = and i32 %x, 65535 ; <i32> [#uses=1]
16 %tmp.3 = shl i32 %y, 16 ; <i32> [#uses=1]
17 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
18 ret i32 %tmp.9
23 %tmp.3 = lshr i32 %x, 16 ; <i32> [#uses=1]
24 %tmp.6 = and i32 %y, -65536 ; <i32> [#uses=1]
[all …]
Drlwimi2.ll9 %tmp.1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
10 %tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1]
11 %tmp.6 = and i32 %srcA, 31775 ; <i32> [#uses=1]
12 %tmp.7 = or i32 %tmp.4, %tmp.6 ; <i32> [#uses=1]
13 %tmp.9 = shl i32 %srcB, 15 ; <i32> [#uses=1]
14 %tmp.12 = and i32 %tmp.9, 32505856 ; <i32> [#uses=1]
15 %tmp.14 = and i32 %srcB, 31775 ; <i32> [#uses=1]
16 %tmp.15 = or i32 %tmp.12, %tmp.14 ; <i32> [#uses=1]
17 %tmp.18 = mul i32 %tmp.7, %alpha ; <i32> [#uses=1]
18 %tmp.20 = sub i32 32, %alpha ; <i32> [#uses=1]
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Drlwimi.ll7 %tmp.3 = shl i32 %x, 16 ; <i32> [#uses=1]
8 %tmp.7 = and i32 %y, 65535 ; <i32> [#uses=1]
9 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
10 ret i32 %tmp.9
15 %tmp.7 = and i32 %x, 65535 ; <i32> [#uses=1]
16 %tmp.3 = shl i32 %y, 16 ; <i32> [#uses=1]
17 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
18 ret i32 %tmp.9
23 %tmp.3 = lshr i32 %x, 16 ; <i32> [#uses=1]
24 %tmp.6 = and i32 %y, -65536 ; <i32> [#uses=1]
[all …]
Drlwimi2.ll9 %tmp.1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
10 %tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1]
11 %tmp.6 = and i32 %srcA, 31775 ; <i32> [#uses=1]
12 %tmp.7 = or i32 %tmp.4, %tmp.6 ; <i32> [#uses=1]
13 %tmp.9 = shl i32 %srcB, 15 ; <i32> [#uses=1]
14 %tmp.12 = and i32 %tmp.9, 32505856 ; <i32> [#uses=1]
15 %tmp.14 = and i32 %srcB, 31775 ; <i32> [#uses=1]
16 %tmp.15 = or i32 %tmp.12, %tmp.14 ; <i32> [#uses=1]
17 %tmp.18 = mul i32 %tmp.7, %alpha ; <i32> [#uses=1]
18 %tmp.20 = sub i32 32, %alpha ; <i32> [#uses=1]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Drlwimi.ll7 %tmp.3 = shl i32 %x, 16 ; <i32> [#uses=1]
8 %tmp.7 = and i32 %y, 65535 ; <i32> [#uses=1]
9 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
10 ret i32 %tmp.9
15 %tmp.7 = and i32 %x, 65535 ; <i32> [#uses=1]
16 %tmp.3 = shl i32 %y, 16 ; <i32> [#uses=1]
17 %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
18 ret i32 %tmp.9
23 %tmp.3 = lshr i32 %x, 16 ; <i32> [#uses=1]
24 %tmp.6 = and i32 %y, -65536 ; <i32> [#uses=1]
[all …]
Drlwimi2.ll9 %tmp.1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
10 %tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1]
11 %tmp.6 = and i32 %srcA, 31775 ; <i32> [#uses=1]
12 %tmp.7 = or i32 %tmp.4, %tmp.6 ; <i32> [#uses=1]
13 %tmp.9 = shl i32 %srcB, 15 ; <i32> [#uses=1]
14 %tmp.12 = and i32 %tmp.9, 32505856 ; <i32> [#uses=1]
15 %tmp.14 = and i32 %srcB, 31775 ; <i32> [#uses=1]
16 %tmp.15 = or i32 %tmp.12, %tmp.14 ; <i32> [#uses=1]
17 %tmp.18 = mul i32 %tmp.7, %alpha ; <i32> [#uses=1]
18 %tmp.20 = sub i32 32, %alpha ; <i32> [#uses=1]
[all …]
/external/pdfium/core/fxcodec/jbig2/
DJBig2_Image.cpp303 uint32_t tmp = 0; in composeTo_opt2() local
306 tmp = (tmp2 & ~maskM) | ((tmp1 | tmp2) & maskM); in composeTo_opt2()
309 tmp = (tmp2 & ~maskM) | ((tmp1 & tmp2) & maskM); in composeTo_opt2()
312 tmp = (tmp2 & ~maskM) | ((tmp1 ^ tmp2) & maskM); in composeTo_opt2()
315 tmp = (tmp2 & ~maskM) | ((~(tmp1 ^ tmp2)) & maskM); in composeTo_opt2()
318 tmp = (tmp2 & ~maskM) | (tmp1 & maskM); in composeTo_opt2()
321 lineDst[0] = (uint8_t)(tmp >> 24); in composeTo_opt2()
322 lineDst[1] = (uint8_t)(tmp >> 16); in composeTo_opt2()
323 lineDst[2] = (uint8_t)(tmp >> 8); in composeTo_opt2()
324 lineDst[3] = (uint8_t)tmp; in composeTo_opt2()
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dsignext.ll6 %tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
7 %tmp.2 = xor i32 %tmp.1, -32768 ; <i32> [#uses=1]
8 %tmp.3 = add i32 %tmp.2, 32768 ; <i32> [#uses=1]
9 ret i32 %tmp.3
12 ; CHECK: %tmp.3 = ashr exact i32 %sext, 16
13 ; CHECK: ret i32 %tmp.3
17 %tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
18 %tmp.2 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
19 %tmp.3 = add i32 %tmp.2, -32768 ; <i32> [#uses=1]
20 ret i32 %tmp.3
[all …]

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