| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 121 define i32 @uadd8(i32 %a, i32 %b) nounwind {
122 ; CHECK-LABEL: uadd8
123 ; CHECK: uadd8 r0, r0, r1
124 %tmp = call i32 @llvm.arm.uadd8(i32 %a, i32 %b)
438 declare i32 @llvm.arm.uadd8(i32, i32) nounwind
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| D | arm-cgp-icmps.ll | 14 ; CHECK-DSP-IMM-NEXT: uadd8 r1, r0, r1
46 ; CHECK-DSP: uadd8 r1, r0, r1
145 ; CHECK-DSP-IMM-NEXT: uadd8 r1, r0, r1
202 ; CHECK-DSP: uadd8 r1, r1, r0
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 101 M(uadd8) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 100 M(uadd8) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 901 0x93,0x1f,0x52,0xe6 = uadd8 r1, r2, r3
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| D | basic-thumb2-instructions.s.cs | 1072 0x82,0xfa,0x43,0xf1 = uadd8 r1, r2, r3
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2299 uadd8 r1, r2, r3
2304 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xe6]
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| D | basic-thumb2-instructions.s | 2805 uadd8 r1, r2, r3
2811 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3618 void uadd8(Condition cond, Register rd, Register rn, Register rm);
3619 void uadd8(Register rd, Register rn, Register rm) { uadd8(al, rd, rn, rm); } in uadd8() function
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| D | disasm-aarch32.h | 1362 void uadd8(Condition cond, Register rd, Register rn, Register rm);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3358 uadd8 r1, r2, r3
3364 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1]
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| D | basic-arm-instructions.s | 3219 uadd8 r1, r2, r3
3224 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xe6]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3217 uadd8 r1, r2, r3
3222 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xe6]
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| D | basic-thumb2-instructions.s | 3302 uadd8 r1, r2, r3
3308 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2037 # CHECK: uadd8 r1, r2, r3
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| D | thumb2.txt | 2175 # CHECK: uadd8 r1, r2, r3
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2326 # CHECK: uadd8 r1, r2, r3
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| D | basic-arm-instructions.txt | 2210 # CHECK: uadd8 r1, r2, r3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2210 # CHECK: uadd8 r1, r2, r3
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| D | thumb2.txt | 2326 # CHECK: uadd8 r1, r2, r3
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1963 def t2UADD8 : T2I_pam<0b000, 0b0100, "uadd8">;
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| D | ARMInstrInfo.td | 3196 def UADD8 : AAI<0b01100101, 0b11111001, "uadd8">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2236 def t2UADD8 : T2I_pam_intrinsics<0b000, 0b0100, "uadd8", int_arm_uadd8>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2168 def t2UADD8 : T2I_pam<0b000, 0b0100, "uadd8">;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7765 "\004trap\003tsb\003tst\002tt\003tta\004ttat\003ttt\006uadd16\005uadd8\004"
9030 …{ 1542 /* uadd8 */, ARM::t2UADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|F…
9031 …{ 1542 /* uadd8 */, ARM::UADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK…
|