| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 263 define i32 @uasx(i32 %a, i32 %b) nounwind {
264 ; CHECK-LABEL: uasx
265 ; CHECK: uasx r0, r0, r1
266 %tmp = call i32 @llvm.arm.uasx(i32 %a, i32 %b)
459 declare i32 @llvm.arm.uasx(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 102 M(uasx) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 101 M(uasx) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1076 0xac,0xfa,0x40,0xf9 = uasx r9, r12, r0
1079 0xac,0xfa,0x40,0xf9 = uasx r9, r12, r0
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| D | basic-arm-instructions.s.cs | 903 0x30,0x9f,0x5c,0xe6 = uasx r9, r12, r0
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2820 uasx r9, r12, r0
2827 @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
2830 @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
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| D | basic-arm-instructions.s | 2311 uasx r9, r12, r0
2314 @ CHECK: uasx r9, r12, r0 @ encoding: [0x30,0x9f,0x5c,0xe6]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2190 # CHECK: uasx r9, r12, r0
2193 # CHECK: uasx r9, r12, r0
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| D | basic-arm-instructions.txt | 2049 # CHECK: uasx r9, r12, r0
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2341 # CHECK: uasx r9, r12, r0
2344 # CHECK: uasx r9, r12, r0
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| D | basic-arm-instructions.txt | 2222 # CHECK: uasx r9, r12, r0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2341 # CHECK: uasx r9, r12, r0
2344 # CHECK: uasx r9, r12, r0
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| D | basic-arm-instructions.txt | 2222 # CHECK: uasx r9, r12, r0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3373 uasx r9, r12, r0
3380 @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
3383 @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
|
| D | basic-arm-instructions.s | 3231 uasx r9, r12, r0
3234 @ CHECK: uasx r9, r12, r0 @ encoding: [0x30,0x9f,0x5c,0xe6]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3317 uasx r9, r12, r0
3324 @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
3327 @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
|
| D | basic-arm-instructions.s | 3229 uasx r9, r12, r0
3232 @ CHECK: uasx r9, r12, r0 @ encoding: [0x30,0x9f,0x5c,0xe6]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3621 void uasx(Condition cond, Register rd, Register rn, Register rm);
3622 void uasx(Register rd, Register rn, Register rm) { uasx(al, rd, rn, rm); } in uasx() function
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| D | disasm-aarch32.h | 1364 void uasx(Condition cond, Register rd, Register rn, Register rm);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3194 def UASX : AAI<0b01100101, 0b11110011, "uasx">;
4983 def : MnemonicAlias<"uaddsubx", "uasx">;
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| D | ARMInstrThumb2.td | 1961 def t2UASX : T2I_pam<0b010, 0b0100, "uasx">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3740 def UASX : AAIIntrinsic<0b01100101, 0b11110011, "uasx", int_arm_uasx>;
5993 def : MnemonicAlias<"uaddsubx", "uasx">;
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| D | ARMInstrThumb2.td | 2234 def t2UASX : T2I_pam_intrinsics<0b010, 0b0100, "uasx", int_arm_uasx>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3595 def UASX : AAI<0b01100101, 0b11110011, "uasx">;
5693 def : MnemonicAlias<"uaddsubx", "uasx">;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 1330 Mnemonic = "uasx"; // "uaddsubx"
7766 "uasx\004ubfx\003udf\004udiv\007uhadd16\006uhadd8\005uhasx\005uhsax\007u"
9032 …{ 1548 /* uasx */, ARM::t2UASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Fea…
9033 …{ 1548 /* uasx */, ARM::UASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_C…
|