/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | acle-intrinsics.ll | 270 define i32 @uhadd16(i32 %a, i32 %b) nounwind { 271 ; CHECK-LABEL: uhadd16 272 ; CHECK: uhadd16 r0, r0, r1 273 %tmp = call i32 @llvm.arm.uhadd16(i32 %a, i32 %b) 461 declare i32 @llvm.arm.uhadd16(i32, i32) nounwind
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-a32.cc | 80 M(uhadd16) \
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D | test-assembler-cond-rd-rn-rm-t32.cc | 79 M(uhadd16) \
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 907 0x12,0x4f,0x78,0xe6 = uhadd16 r4, r8, r2
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D | basic-thumb2-instructions.s.cs | 1085 0x98,0xfa,0x62,0xf4 = uhadd16 r4, r8, r2
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2331 uhadd16 r4, r8, r2 2336 @ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x78,0xe6]
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D | basic-thumb2-instructions.s | 2850 uhadd16 r4, r8, r2 2856 @ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3638 void uhadd16(Condition cond, Register rd, Register rn, Register rm); 3639 void uhadd16(Register rd, Register rn, Register rm) { in uhadd16() function 3640 uhadd16(al, rd, rn, rm); in uhadd16()
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D | disasm-aarch32.h | 1373 void uhadd16(Condition cond, Register rd, Register rn, Register rm);
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3403 uhadd16 r4, r8, r2 3409 @ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4]
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D | basic-arm-instructions.s | 3251 uhadd16 r4, r8, r2 3256 @ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x78,0xe6]
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 3249 uhadd16 r4, r8, r2 3254 @ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x78,0xe6]
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D | basic-thumb2-instructions.s | 3347 uhadd16 r4, r8, r2 3353 @ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2069 # CHECK: uhadd16 r4, r8, r2
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D | thumb2.txt | 2220 # CHECK: uhadd16 r4, r8, r2
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2371 # CHECK: uhadd16 r4, r8, r2
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D | basic-arm-instructions.txt | 2242 # CHECK: uhadd16 r4, r8, r2
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2242 # CHECK: uhadd16 r4, r8, r2
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D | thumb2.txt | 2371 # CHECK: uhadd16 r4, r8, r2
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1977 def t2UHADD16 : T2I_pam<0b001, 0b0110, "uhadd16">;
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D | ARMInstrInfo.td | 3210 def UHADD16 : AAI<0b01100111, 0b11110001, "uhadd16">;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2250 def t2UHADD16 : T2I_pam_intrinsics<0b001, 0b0110, "uhadd16", int_arm_uhadd16>;
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D | ARMInstrInfo.td | 3756 def UHADD16 : AAIIntrinsic<0b01100111, 0b11110001, "uhadd16", int_arm_uhadd16>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2182 def t2UHADD16 : T2I_pam<0b001, 0b0110, "uhadd16">;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 7766 "uasx\004ubfx\003udf\004udiv\007uhadd16\006uhadd8\005uhasx\005uhsax\007u" 9041 …{ 1567 /* uhadd16 */, ARM::t2UHADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThum… 9042 …{ 1567 /* uhadd16 */, ARM::UHADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, {…
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