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Searched refs:uhsub16 (Results 1 – 25 of 31) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dacle-intrinsics.ll291 define i32 @uhsub16(i32 %a, i32 %b) nounwind {
292 ; CHECK-LABEL: uhsub16
293 ; CHECK: uhsub16 r0, r0, r1
294 %tmp = call i32 @llvm.arm.uhsub16(i32 %a, i32 %b)
464 declare i32 @llvm.arm.uhsub16(i32, i32) nounwind
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-a32.cc84 M(uhsub16) \
Dtest-assembler-cond-rd-rn-rm-t32.cc83 M(uhsub16) \
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs913 0x72,0x4f,0x78,0xe6 = uhsub16 r4, r8, r2
Dbasic-thumb2-instructions.s.cs1100 0xd8,0xfa,0x63,0xf5 = uhsub16 r5, r8, r3
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2355 uhsub16 r4, r8, r2
2360 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
Dbasic-thumb2-instructions.s2892 uhsub16 r5, r8, r3
2898 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3652 void uhsub16(Condition cond, Register rd, Register rn, Register rm);
3653 void uhsub16(Register rd, Register rn, Register rm) { in uhsub16() function
3654 uhsub16(al, rd, rn, rm); in uhsub16()
Ddisasm-aarch32.h1381 void uhsub16(Condition cond, Register rd, Register rn, Register rm);
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s3445 uhsub16 r5, r8, r3
3451 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
Dbasic-arm-instructions.s3275 uhsub16 r4, r8, r2
3280 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s3273 uhsub16 r4, r8, r2
3278 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
Dbasic-thumb2-instructions.s3389 uhsub16 r5, r8, r3
3395 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt2093 # CHECK: uhsub16 r4, r8, r2
Dthumb2.txt2251 # CHECK: uhsub16 r5, r8, r3
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt2402 # CHECK: uhsub16 r5, r8, r3
Dbasic-arm-instructions.txt2266 # CHECK: uhsub16 r4, r8, r2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt2266 # CHECK: uhsub16 r4, r8, r2
Dthumb2.txt2402 # CHECK: uhsub16 r5, r8, r3
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td1980 def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">;
DARMInstrInfo.td3213 def UHSUB16 : AAI<0b01100111, 0b11110111, "uhsub16">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td2253 def t2UHSUB16 : T2I_pam_intrinsics<0b101, 0b0110, "uhsub16", int_arm_uhsub16>;
DARMInstrInfo.td3759 def UHSUB16 : AAIIntrinsic<0b01100111, 0b11110111, "uhsub16", int_arm_uhsub16>;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2185 def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">;
DARMInstrInfo.td3614 def UHSUB16 : AAI<0b01100111, 0b11110111, "uhsub16">;

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