/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | acle-intrinsics.ll | 291 define i32 @uhsub16(i32 %a, i32 %b) nounwind { 292 ; CHECK-LABEL: uhsub16 293 ; CHECK: uhsub16 r0, r0, r1 294 %tmp = call i32 @llvm.arm.uhsub16(i32 %a, i32 %b) 464 declare i32 @llvm.arm.uhsub16(i32, i32) nounwind
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-a32.cc | 84 M(uhsub16) \
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D | test-assembler-cond-rd-rn-rm-t32.cc | 83 M(uhsub16) \
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 913 0x72,0x4f,0x78,0xe6 = uhsub16 r4, r8, r2
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D | basic-thumb2-instructions.s.cs | 1100 0xd8,0xfa,0x63,0xf5 = uhsub16 r5, r8, r3
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2355 uhsub16 r4, r8, r2 2360 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
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D | basic-thumb2-instructions.s | 2892 uhsub16 r5, r8, r3 2898 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3652 void uhsub16(Condition cond, Register rd, Register rn, Register rm); 3653 void uhsub16(Register rd, Register rn, Register rm) { in uhsub16() function 3654 uhsub16(al, rd, rn, rm); in uhsub16()
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D | disasm-aarch32.h | 1381 void uhsub16(Condition cond, Register rd, Register rn, Register rm);
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3445 uhsub16 r5, r8, r3 3451 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
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D | basic-arm-instructions.s | 3275 uhsub16 r4, r8, r2 3280 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 3273 uhsub16 r4, r8, r2 3278 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
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D | basic-thumb2-instructions.s | 3389 uhsub16 r5, r8, r3 3395 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2093 # CHECK: uhsub16 r4, r8, r2
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D | thumb2.txt | 2251 # CHECK: uhsub16 r5, r8, r3
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2402 # CHECK: uhsub16 r5, r8, r3
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D | basic-arm-instructions.txt | 2266 # CHECK: uhsub16 r4, r8, r2
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2266 # CHECK: uhsub16 r4, r8, r2
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D | thumb2.txt | 2402 # CHECK: uhsub16 r5, r8, r3
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1980 def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">;
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D | ARMInstrInfo.td | 3213 def UHSUB16 : AAI<0b01100111, 0b11110111, "uhsub16">;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2253 def t2UHSUB16 : T2I_pam_intrinsics<0b101, 0b0110, "uhsub16", int_arm_uhsub16>;
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D | ARMInstrInfo.td | 3759 def UHSUB16 : AAIIntrinsic<0b01100111, 0b11110111, "uhsub16", int_arm_uhsub16>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2185 def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">;
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D | ARMInstrInfo.td | 3614 def UHSUB16 : AAI<0b01100111, 0b11110111, "uhsub16">;
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