| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 135 define i32 @uhsub8(i32 %a, i32 %b) nounwind {
136 ; CHECK-LABEL: uhsub8
137 ; CHECK: uhsub8 r0, r0, r1
138 %tmp = call i32 @llvm.arm.uhsub8(i32 %a, i32 %b)
440 declare i32 @llvm.arm.uhsub8(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 85 M(uhsub8) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 84 M(uhsub8) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 915 0xf2,0x4f,0x78,0xe6 = uhsub8 r4, r8, r2
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| D | basic-thumb2-instructions.s.cs | 1101 0xc7,0xfa,0x66,0xf1 = uhsub8 r1, r7, r6
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2357 uhsub8 r4, r8, r2
2362 @ CHECK: uhsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x78,0xe6]
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| D | basic-thumb2-instructions.s | 2893 uhsub8 r1, r7, r6
2899 @ CHECK: uhsub8 r1, r7, r6 @ encoding: [0xc7,0xfa,0x66,0xf1]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3657 void uhsub8(Condition cond, Register rd, Register rn, Register rm);
3658 void uhsub8(Register rd, Register rn, Register rm) { uhsub8(al, rd, rn, rm); } in uhsub8() function
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| D | disasm-aarch32.h | 1383 void uhsub8(Condition cond, Register rd, Register rn, Register rm);
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3446 uhsub8 r1, r7, r6
3452 @ CHECK: uhsub8 r1, r7, r6 @ encoding: [0xc7,0xfa,0x66,0xf1]
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| D | basic-arm-instructions.s | 3277 uhsub8 r4, r8, r2
3282 @ CHECK: uhsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x78,0xe6]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3275 uhsub8 r4, r8, r2
3280 @ CHECK: uhsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x78,0xe6]
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| D | basic-thumb2-instructions.s | 3390 uhsub8 r1, r7, r6
3396 @ CHECK: uhsub8 r1, r7, r6 @ encoding: [0xc7,0xfa,0x66,0xf1]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2095 # CHECK: uhsub8 r4, r8, r2
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| D | thumb2.txt | 2252 # CHECK: uhsub8 r1, r7, r6
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2403 # CHECK: uhsub8 r1, r7, r6
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| D | basic-arm-instructions.txt | 2268 # CHECK: uhsub8 r4, r8, r2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2268 # CHECK: uhsub8 r4, r8, r2
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| D | thumb2.txt | 2403 # CHECK: uhsub8 r1, r7, r6
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1981 def t2UHSUB8 : T2I_pam<0b100, 0b0110, "uhsub8">;
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| D | ARMInstrInfo.td | 3214 def UHSUB8 : AAI<0b01100111, 0b11111111, "uhsub8">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2254 def t2UHSUB8 : T2I_pam_intrinsics<0b100, 0b0110, "uhsub8", int_arm_uhsub8>;
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| D | ARMInstrInfo.td | 3760 def UHSUB8 : AAIIntrinsic<0b01100111, 0b11111111, "uhsub8", int_arm_uhsub8>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2186 def t2UHSUB8 : T2I_pam<0b100, 0b0110, "uhsub8">;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7767 "hsub16\006uhsub8\005umaal\005umlal\005umull\007uqadd16\006uqadd8\005uqa"
9051 …{ 1602 /* uhsub8 */, ARM::t2UHSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2…
9052 …{ 1602 /* uhsub8 */, ARM::UHSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { M…
|