| /external/u-boot/arch/powerpc/include/asm/ |
| D | immap_86xx.h | 21 uint ccsrbar; /* 0x0 - Control Configuration Status Registers Base Address Register */
23 uint altcbar; /* 0x8 - Alternate Configuration Base Address Register */
25 uint altcar; /* 0x10 - Alternate Configuration Attribute Register */
27 uint bptr; /* 0x20 - Boot Page Translation Register */
29 uint lawbar0; /* 0xc08 - Local Access Window 0 Base Address Register */
31 uint lawar0; /* 0xc10 - Local Access Window 0 Attributes Register */
33 uint lawbar1; /* 0xc28 - Local Access Window 1 Base Address Register */
35 uint lawar1; /* 0xc30 - Local Access Window 1 Attributes Register */
37 uint lawbar2; /* 0xc48 - Local Access Window 2 Base Address Register */
39 uint lawar2; /* 0xc50 - Local Access Window 2 Attributes Register */
[all …]
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| D | cpm_85xx.h | 21 #define CPM_CR_RST ((uint)0x80000000)
22 #define CPM_CR_PAGE ((uint)0x7c000000)
23 #define CPM_CR_SBLOCK ((uint)0x03e00000)
24 #define CPM_CR_FLG ((uint)0x00010000)
25 #define CPM_CR_MCN ((uint)0x00003fc0)
26 #define CPM_CR_OPCODE ((uint)0x0000000f)
78 #define CPM_DATAONLY_BASE ((uint)128)
79 #define CPM_DP_NOSPACE ((uint)0x7FFFFFFF)
81 #define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
82 #define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
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| D | immap_8xx.h | 18 uint sc_siumcr;
19 uint sc_sypcr;
20 uint sc_swt;
23 uint sc_sipend;
24 uint sc_simask;
25 uint sc_siel;
26 uint sc_sivec;
27 uint sc_tesr;
29 uint sc_sdcr;
36 uint pcmc_pbr0;
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| D | cpm_8xx.h | 63 #define BD_IIC_START ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */
75 uint cbd_bufaddr; /* Buffer address in host memory */
95 #define PROFF_SCC1 ((uint)0x0000)
96 #define PROFF_IIC ((uint)0x0080)
97 #define PROFF_REVNUM ((uint)0x00b0)
98 #define PROFF_SCC2 ((uint)0x0100)
99 #define PROFF_SPI ((uint)0x0180)
100 #define PROFF_SCC3 ((uint)0x0200)
101 #define PROFF_SMC1 ((uint)0x0280)
102 #define PROFF_SCC4 ((uint)0x0300)
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| /external/u-boot/arch/arm/include/asm/arch-tegra/ |
| D | pmc.h | 12 uint pmc_cntrl; /* _CNTRL_0, offset 00 */
13 uint pmc_sec_disable; /* _SEC_DISABLE_0, offset 04 */
14 uint pmc_pmc_swrst; /* _PMC_SWRST_0, offset 08 */
15 uint pmc_wake_mask; /* _WAKE_MASK_0, offset 0C */
16 uint pmc_wake_lvl; /* _WAKE_LVL_0, offset 10 */
17 uint pmc_wake_status; /* _WAKE_STATUS_0, offset 14 */
18 uint pmc_sw_wake_status; /* _SW_WAKE_STATUS_0, offset 18 */
19 uint pmc_dpd_pads_oride; /* _DPD_PADS_ORIDE_0, offset 1C */
20 uint pmc_dpd_sample; /* _DPD_PADS_SAMPLE_0, offset 20 */
21 uint pmc_dpd_enable; /* _DPD_PADS_ENABLE_0, offset 24 */
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| D | dc.h | 15 uint gen_incr_syncpt; /* _CMD_GENERAL_INCR_SYNCPT_0 */
16 uint gen_incr_syncpt_ctrl; /* _CMD_GENERAL_INCR_SYNCPT_CNTRL_0 */
17 uint gen_incr_syncpt_err; /* _CMD_GENERAL_INCR_SYNCPT_ERROR_0 */
19 uint reserved0[5]; /* reserved_0[5] */
22 uint win_a_incr_syncpt; /* _CMD_WIN_A_INCR_SYNCPT_0 */
23 uint win_a_incr_syncpt_ctrl; /* _CMD_WIN_A_INCR_SYNCPT_CNTRL_0 */
24 uint win_a_incr_syncpt_err; /* _CMD_WIN_A_INCR_SYNCPT_ERROR_0 */
26 uint reserved1[5]; /* reserved_1[5] */
29 uint win_b_incr_syncpt; /* _CMD_WIN_B_INCR_SYNCPT_0 */
30 uint win_b_incr_syncpt_ctrl; /* _CMD_WIN_B_INCR_SYNCPT_CNTRL_0 */
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| D | clk_rst.h | 12 uint pll_base; /* the control register */
14 uint pll_out[2];
15 uint pll_misc; /* other misc things */
20 uint pll_base; /* the control register */
21 uint pll_misc; /* other misc things */
25 uint pllm_base; /* the control register */
26 uint pllm_out; /* output control */
27 uint pllm_misc1; /* misc1 */
28 uint pllm_misc2; /* misc2 */
33 uint set;
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| D | usb.h | 13 uint id;
14 uint reserved0;
15 uint host;
16 uint device;
19 uint txbuf;
20 uint rxbuf;
21 uint reserved1[2];
24 uint reserved2[56];
29 uint hcs_params;
30 uint hcc_params;
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| /external/u-boot/include/ |
| D | lcdvideo.h | 11 #define LCCR_BNUM ((uint)0xfffe0000)
12 #define LCCR_EIEN ((uint)0x00010000)
13 #define LCCR_IEN ((uint)0x00008000)
14 #define LCCR_IRQL ((uint)0x00007000)
15 #define LCCR_CLKP ((uint)0x00000800)
16 #define LCCR_OEP ((uint)0x00000400)
17 #define LCCR_HSP ((uint)0x00000200)
18 #define LCCR_VSP ((uint)0x00000100)
19 #define LCCR_DP ((uint)0x00000080)
20 #define LCCR_BPIX ((uint)0x00000060)
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| /external/deqp-deps/glslang/Test/baseResults/ |
| D | hlsl.getdimensions.dx10.frag.out | 10 0:65 move second child to first child ( temp uint)
11 0:65 'sizeQueryTemp' ( temp uint)
12 0:65 textureSize ( temp uint)
16 0:65 move second child to first child ( temp uint)
17 0:65 'WidthU' ( temp uint)
18 0:65 'sizeQueryTemp' ( temp uint)
20 0:66 move second child to first child ( temp uint)
21 0:66 'sizeQueryTemp' ( temp uint)
22 0:66 textureSize ( temp uint)
25 0:66 6 (const uint)
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| D | hlsl.intrinsics.comp.out | 10 0:17 'inU0' ( in uint)
11 0:17 'inU1' ( in uint)
16 0:24 AtomicAdd ( temp uint)
17 0:24 'gs_ua' ( shared uint)
18 0:24 'gs_ub' ( shared uint)
19 0:25 move second child to first child ( temp uint)
20 0:25 'out_u1' ( temp uint)
21 0:25 AtomicAdd ( temp uint)
22 0:25 'gs_ua' ( shared uint)
23 0:25 'gs_ub' ( shared uint)
[all …]
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| D | hlsl.rw.atomics.frag.out | 11 … block{ uniform uint u1, uniform 2-component vector of uint u2, uniform 3-component vector of ui…
13 0:50 5 (const uint)
15 … block{ uniform uint u1, uniform 2-component vector of uint u2, uniform 3-component vector of ui…
17 0:50 8 (const uint)
23 … block{ uniform uint u1, uniform 2-component vector of uint u2, uniform 3-component vector of ui…
25 0:51 5 (const uint)
27 … block{ uniform uint u1, uniform 2-component vector of uint u2, uniform 3-component vector of ui…
29 0:51 5 (const uint)
33 … block{ uniform uint u1, uniform 2-component vector of uint u2, uniform 3-component vector of ui…
35 0:52 5 (const uint)
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| D | hlsl.getdimensions.rw.dx10.frag.out | 10 0:63 move second child to first child ( temp uint)
11 0:63 'sizeQueryTemp' ( temp uint)
12 0:63 imageQuerySize ( temp uint)
14 0:63 move second child to first child ( temp uint)
15 0:63 'WidthU' ( temp uint)
16 0:63 'sizeQueryTemp' ( temp uint)
18 0:64 move second child to first child ( temp uint)
19 0:64 'sizeQueryTemp' ( temp uint)
20 0:64 imageQuerySize ( temp uint)
22 0:64 move second child to first child ( temp uint)
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| D | hlsl.structbuffer.atomics.frag.out | 7 0:5 'pos' ( in uint)
9 0:8 AtomicAdd ( temp uint)
10 0:8 indirect index (layout( row_major std430) buffer uint)
11 …data: direct index for structure (layout( row_major std430) buffer unsized 1-element array of uint)
12 …major std430) buffer block{layout( row_major std430) buffer unsized 1-element array of uint @data})
14 0:8 0 (const uint)
22 0:9 move second child to first child ( temp uint)
23 0:9 'u' ( temp uint)
24 0:9 AtomicAdd ( temp uint)
25 0:9 indirect index (layout( row_major std430) buffer uint)
[all …]
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| D | hlsl.structbuffer.rwbyte.frag.out | 7 0:5 'pos' ( in uint)
10 0:7 move second child to first child ( temp uint)
11 0:7 'size' ( temp uint)
12 0:7 array length ( temp uint)
13 …data: direct index for structure (layout( row_major std430) buffer unsized 1-element array of uint)
14 …major std430) buffer block{layout( row_major std430) buffer unsized 1-element array of uint @data})
16 0:7 0 (const uint)
21 0:9 'pos' ( in uint)
24 0:9 move second child to first child ( temp uint)
25 0:9 indirect index (layout( row_major std430) buffer uint)
[all …]
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| D | hlsl.structbuffer.incdec.frag.out | 7 0:7 'pos' ( in uint)
10 0:8 move second child to first child ( temp 4-component vector of uint)
11 0:8 'result' ( temp 4-component vector of uint)
13 0:8 0 (const uint)
14 0:8 0 (const uint)
15 0:8 0 (const uint)
16 0:8 0 (const uint)
17 0:10 direct index (layout( row_major std430) buffer 4-component vector of uint)
18 … structure (layout( row_major std430) buffer unsized 1-element array of 4-component vector of uint)
19 …lock{layout( row_major std430) buffer unsized 1-element array of 4-component vector of uint @data})
[all …]
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| /external/mesa3d/src/gallium/auxiliary/util/ |
| D | u_tile.h | 46 u_clip_tile(uint x, uint y, uint *w, uint *h, const struct pipe_box *box) in u_clip_tile()
66 uint x, uint y, uint w, uint h,
72 uint x, uint y, uint w, uint h,
79 uint x, uint y, uint w, uint h,
85 uint x, uint y, uint w, uint h,
92 uint x, uint y, uint w, uint h,
98 uint x, uint y, uint w, uint h,
106 uint x, uint y, uint w, uint h,
107 uint *z);
112 uint x, uint y, uint w, uint h,
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| /external/arm-neon-tests/ |
| D | ref_vreinterpret.c | 103 TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 8, 8); in exec_vreinterpret()
104 TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 16, 4); in exec_vreinterpret()
105 TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 32, 2); in exec_vreinterpret()
106 TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 64, 1); in exec_vreinterpret()
114 TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 8, 8); in exec_vreinterpret()
115 TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 16, 4); in exec_vreinterpret()
116 TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 32, 2); in exec_vreinterpret()
117 TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 64, 1); in exec_vreinterpret()
125 TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 8, 8); in exec_vreinterpret()
126 TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 16, 4); in exec_vreinterpret()
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| D | ref_v_comp_op.c | 59 DECL_VARIABLE(vector, uint, 8, 8); in FNNAME()
60 DECL_VARIABLE(vector, uint, 16, 4); in FNNAME()
61 DECL_VARIABLE(vector, uint, 32, 2); in FNNAME()
66 DECL_VARIABLE(vector, uint, 8, 16); in FNNAME()
67 DECL_VARIABLE(vector, uint, 16, 8); in FNNAME()
68 DECL_VARIABLE(vector, uint, 32, 4); in FNNAME()
74 DECL_VARIABLE(vector2, uint, 8, 8); in FNNAME()
75 DECL_VARIABLE(vector2, uint, 16, 4); in FNNAME()
76 DECL_VARIABLE(vector2, uint, 32, 2); in FNNAME()
81 DECL_VARIABLE(vector2, uint, 8, 16); in FNNAME()
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| D | ref_vrshr_n.c | 60 TEST_VRSHR_N(, uint, u, 8, 8, 2); in exec_vrshr_n()
61 TEST_VRSHR_N(, uint, u, 16, 4, 3); in exec_vrshr_n()
62 TEST_VRSHR_N(, uint, u, 32, 2, 5); in exec_vrshr_n()
63 TEST_VRSHR_N(, uint, u, 64, 1, 33); in exec_vrshr_n()
69 TEST_VRSHR_N(q, uint, u, 8, 16, 2); in exec_vrshr_n()
70 TEST_VRSHR_N(q, uint, u, 16, 8, 3); in exec_vrshr_n()
71 TEST_VRSHR_N(q, uint, u, 32, 4, 5); in exec_vrshr_n()
72 TEST_VRSHR_N(q, uint, u, 64, 2, 33); in exec_vrshr_n()
82 VDUP(vector, , uint, u, 8, 8, 0xFF); in exec_vrshr_n()
83 VDUP(vector, , uint, u, 16, 4, 0xFFFF); in exec_vrshr_n()
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| /external/skia/src/compute/hs/cl/intel/gen8/u32/ |
| D | hs_kernels.pre.cl | 5 hs_kernel_bs_0(__global uint const* const restrict vin,
6 __global uint* const restrict vout)
8 uint const gmem_idx = (get_global_id(0) & ~((1 << 4) - 1)) * 8 +
10 uint r1 = vin[gmem_idx + (1 << 4) * 0];
11 uint r2 = vin[gmem_idx + (1 << 4) * 1];
12 uint r3 = vin[gmem_idx + (1 << 4) * 2];
13 uint r4 = vin[gmem_idx + (1 << 4) * 3];
14 uint r5 = vin[gmem_idx + (1 << 4) * 4];
15 uint r6 = vin[gmem_idx + (1 << 4) * 5];
16 uint r7 = vin[gmem_idx + (1 << 4) * 6];
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| /external/skqp/src/compute/hs/cl/intel/gen8/u32/ |
| D | hs_kernels.pre.cl | 5 hs_kernel_bs_0(__global uint const* const restrict vin,
6 __global uint* const restrict vout)
8 uint const gmem_idx = (get_global_id(0) & ~((1 << 4) - 1)) * 8 +
10 uint r1 = vin[gmem_idx + (1 << 4) * 0];
11 uint r2 = vin[gmem_idx + (1 << 4) * 1];
12 uint r3 = vin[gmem_idx + (1 << 4) * 2];
13 uint r4 = vin[gmem_idx + (1 << 4) * 3];
14 uint r5 = vin[gmem_idx + (1 << 4) * 4];
15 uint r6 = vin[gmem_idx + (1 << 4) * 5];
16 uint r7 = vin[gmem_idx + (1 << 4) * 6];
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| /external/mesa3d/src/gallium/drivers/trace/ |
| D | tr_dump_state.c | 70 trace_dump_member(uint, templat, last_level); in trace_dump_resource_template()
71 trace_dump_member(uint, templat, nr_samples); in trace_dump_resource_template()
72 trace_dump_member(uint, templat, usage); in trace_dump_resource_template()
73 trace_dump_member(uint, templat, bind); in trace_dump_resource_template()
74 trace_dump_member(uint, templat, flags); in trace_dump_resource_template()
119 trace_dump_member(uint, state, front_ccw); in trace_dump_rasterizer_state()
120 trace_dump_member(uint, state, cull_face); in trace_dump_rasterizer_state()
121 trace_dump_member(uint, state, fill_front); in trace_dump_rasterizer_state()
122 trace_dump_member(uint, state, fill_back); in trace_dump_rasterizer_state()
149 trace_dump_member(uint, state, clip_plane_enable); in trace_dump_rasterizer_state()
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| /external/grpc-grpc/src/core/lib/debug/ |
| D | stats_data.cc | 361 uint64_t uint; in grpc_stats_inc_call_initial_size() member
364 if (_val.uint < 4651092515166879744ull) { in grpc_stats_inc_call_initial_size()
366 grpc_stats_table_1[((_val.uint - 4618441417868443648ull) >> 49)] + 6; in grpc_stats_inc_call_initial_size()
368 bucket -= (_val.uint < _bkt.uint); in grpc_stats_inc_call_initial_size()
384 uint64_t uint; in grpc_stats_inc_poll_events_returned() member
387 if (_val.uint < 4642789003353915392ull) { in grpc_stats_inc_poll_events_returned()
389 grpc_stats_table_3[((_val.uint - 4628855992006737920ull) >> 47)] + 29; in grpc_stats_inc_poll_events_returned()
391 bucket -= (_val.uint < _bkt.uint); in grpc_stats_inc_poll_events_returned()
407 uint64_t uint; in grpc_stats_inc_tcp_write_size() member
410 if (_val.uint < 4683743612465315840ull) { in grpc_stats_inc_tcp_write_size()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_fpc.h | 56 uint num_immediates;
57 uint immediates_map[I915_MAX_CONSTANT];
62 uint declarations[I915_PROGRAM_SIZE];
63 uint program[I915_PROGRAM_SIZE];
65 uint *csr; /**< Cursor, points into program. */
67 uint *decl; /**< Cursor, points into declarations. */
69 uint decl_s; /**< flags for which s regs need to be decl'd */
70 uint decl_t; /**< flags for which t regs need to be decl'd */
72 uint temp_flag; /**< Tracks temporary regs which are in use */
73 uint utemp_flag; /**< Tracks TYPE_U temporary regs which are in use */
[all …]
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