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Searched refs:uqadd8 (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-UQADD8-arm.txt15 # CHECK: uqadd8 r5, r6, pc
Darm-tests.txt336 # CHECK: uqadd8 r5, r6, r7
Dthumb2.txt2455 # CHECK: uqadd8 r3, r4, r8
Dbasic-arm-instructions.txt2320 # CHECK: uqadd8 r3, r4, r8
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dunpredictable-UQADD8-arm.txt15 # CHECK: uqadd8 r5, r6, pc
Darm-tests.txt336 # CHECK: uqadd8 r5, r6, r7
Dbasic-arm-instructions.txt2320 # CHECK: uqadd8 r3, r4, r8
Dthumb2.txt2455 # CHECK: uqadd8 r3, r4, r8
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dacle-intrinsics.ll142 define i32 @uqadd8(i32 %a, i32 %b) nounwind {
143 ; CHECK-LABEL: uqadd8
144 ; CHECK: uqadd8 r0, r0, r1
145 %tmp = call i32 @llvm.arm.uqadd8(i32 %a, i32 %b)
441 declare i32 @llvm.arm.uqadd8(i32, i32) nounwind
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Darm-tests.txt294 # CHECK: uqadd8 r5, r6, r7
Dbasic-arm-instructions.txt2147 # CHECK: uqadd8 r3, r4, r8
Dthumb2.txt2304 # CHECK: uqadd8 r3, r4, r8
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-a32.cc87 M(uqadd8) \
Dtest-assembler-cond-rd-rn-rm-t32.cc86 M(uqadd8) \
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs929 0x98,0x3f,0x64,0xe6 = uqadd8 r3, r4, r8
Dbasic-thumb2-instructions.s.cs1115 0x84,0xfa,0x58,0xf3 = uqadd8 r3, r4, r8
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2409 uqadd8 r3, r4, r8
2415 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x98,0x3f,0x64,0xe6]
Dbasic-thumb2-instructions.s2945 uqadd8 r3, r4, r8
2951 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x58,0xf3]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3695 void uqadd8(Condition cond, Register rd, Register rn, Register rm);
3696 void uqadd8(Register rd, Register rn, Register rm) { uqadd8(al, rd, rn, rm); } in uqadd8() function
Ddisasm-aarch32.h1402 void uqadd8(Condition cond, Register rd, Register rn, Register rm);
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s3498 uqadd8 r3, r4, r8
3504 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x58,0xf3]
Dbasic-arm-instructions.s3329 uqadd8 r3, r4, r8
3335 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x98,0x3f,0x64,0xe6]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s3327 uqadd8 r3, r4, r8
3333 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x98,0x3f,0x64,0xe6]
Dbasic-thumb2-instructions.s3442 uqadd8 r3, r4, r8
3448 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x58,0xf3]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td1947 def t2UQADD8 : T2I_pam<0b000, 0b0101, "uqadd8">;

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