| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 312 define i32 @uqsax(i32 %a, i32 %b) nounwind {
313 ; CHECK-LABEL: uqsax
314 ; CHECK: uqsax r0, r0, r1
315 %tmp = call i32 @llvm.arm.uqsax(i32 %a, i32 %b)
467 declare i32 @llvm.arm.uqsax(i32, i32) nounwind
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 297 # CHECK: uqsax r5, r6, r7
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| D | basic-arm-instructions.txt | 2170 # CHECK: uqsax r1, r3, r7
2171 # CHECK: uqsax r3, r6, r2
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| D | thumb2.txt | 2320 # CHECK: uqsax r3, r4, r8
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 339 # CHECK: uqsax r5, r6, r7
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| D | basic-arm-instructions.txt | 2343 # CHECK: uqsax r1, r3, r7
2344 # CHECK: uqsax r3, r6, r2
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| D | thumb2.txt | 2471 # CHECK: uqsax r3, r4, r8
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 339 # CHECK: uqsax r5, r6, r7
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| D | basic-arm-instructions.txt | 2343 # CHECK: uqsax r1, r3, r7
2344 # CHECK: uqsax r3, r6, r2
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| D | thumb2.txt | 2471 # CHECK: uqsax r3, r4, r8
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 933 0x57,0x1f,0x63,0xe6 = uqsax r1, r3, r7
934 0x52,0x3f,0x66,0xe6 = uqsax r3, r6, r2
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| D | basic-thumb2-instructions.s.cs | 1120 0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8
1125 0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 89 M(uqsax) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 88 M(uqsax) \
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2432 uqsax r1, r3, r7
2435 @ CHECK: uqsax r1, r3, r7 @ encoding: [0x57,0x1f,0x63,0xe6]
2436 @ CHECK: uqsax r3, r6, r2 @ encoding: [0x52,0x3f,0x66,0xe6]
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| D | basic-thumb2-instructions.s | 2961 uqsax r3, r4, r8
2973 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
2979 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3514 uqsax r3, r4, r8
3526 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
3532 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
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| D | basic-arm-instructions.s | 3352 uqsax r1, r3, r7
3355 @ CHECK: uqsax r1, r3, r7 @ encoding: [0x57,0x1f,0x63,0xe6]
3356 @ CHECK: uqsax r3, r6, r2 @ encoding: [0x52,0x3f,0x66,0xe6]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3350 uqsax r1, r3, r7
3353 @ CHECK: uqsax r1, r3, r7 @ encoding: [0x57,0x1f,0x63,0xe6]
3354 @ CHECK: uqsax r3, r6, r2 @ encoding: [0x52,0x3f,0x66,0xe6]
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| D | basic-thumb2-instructions.s | 3458 uqsax r3, r4, r8
3470 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
3476 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3701 void uqsax(Condition cond, Register rd, Register rn, Register rm);
3702 void uqsax(Register rd, Register rn, Register rm) { uqsax(al, rd, rn, rm); } in uqsax() function
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| D | disasm-aarch32.h | 1406 void uqsax(Condition cond, Register rd, Register rn, Register rm);
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3182 def UQSAX : AAI<0b01100110, 0b11110101, "uqsax">;
4991 def : MnemonicAlias<"uqsubaddx", "uqsax">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3730 def UQSAX : AAIIntrinsic<0b01100110, 0b11110101, "uqsax", int_arm_uqsax>;
6001 def : MnemonicAlias<"uqsubaddx", "uqsax">;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3583 def UQSAX : AAI<0b01100110, 0b11110101, "uqsax">;
5701 def : MnemonicAlias<"uqsubaddx", "uqsax">;
|