| /external/capstone/suite/MC/AArch64/ |
| D | neon-simd-shift.s.cs | 125 0x20,0x94,0x0d,0x6f = uqshrn2 v0.16b, v1.8h, #3
126 0x20,0x94,0x1d,0x6f = uqshrn2 v0.8h, v1.4s, #3
127 0x20,0x94,0x3d,0x6f = uqshrn2 v0.4s, v1.2d, #3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 353 uqshrn2 v0.16b, v1.8h, #3
354 uqshrn2 v0.8h, v1.4s, #3
355 uqshrn2 v0.4s, v1.2d, #3
|
| D | arm64-advsimd.s | 1583 uqshrn2.16b v0, v0, #2
1585 uqshrn2.8h v0, v0, #4
1587 uqshrn2.4s v0, v0, #6
1755 ; CHECK: uqshrn2.16b v0, v0, #2 ; encoding: [0x00,0x94,0x0e,0x6f]
1757 ; CHECK: uqshrn2.8h v0, v0, #4 ; encoding: [0x00,0x94,0x1c,0x6f]
1759 ; CHECK: uqshrn2.4s v0, v0, #6 ; encoding: [0x00,0x94,0x3a,0x6f]
1848 uqshrn2 v8.16b, v9.8h, #2
1850 uqshrn2 v6.8h, v7.4s, #4
1852 uqshrn2 v4.4s, v5.2d, #6
1912 ; CHECK: uqshrn2.16b v8, v9, #2 ; encoding: [0x28,0x95,0x0e,0x6f]
[all …]
|
| D | arm64-diags.s | 132 uqshrn2 v4.4s, v5.2d, #67
144 ; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67
|
| D | neon-diagnostics.s | 1960 uqshrn2 v0.16b, v1.8h, #17
1961 uqshrn2 v0.8h, v1.4s, #33
1962 uqshrn2 v0.4s, v1.2d, #65
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 353 uqshrn2 v0.16b, v1.8h, #3
354 uqshrn2 v0.8h, v1.4s, #3
355 uqshrn2 v0.4s, v1.2d, #3
|
| D | arm64-advsimd.s | 1583 uqshrn2.16b v0, v0, #2
1585 uqshrn2.8h v0, v0, #4
1587 uqshrn2.4s v0, v0, #6
1755 ; CHECK: uqshrn2.16b v0, v0, #2 ; encoding: [0x00,0x94,0x0e,0x6f]
1757 ; CHECK: uqshrn2.8h v0, v0, #4 ; encoding: [0x00,0x94,0x1c,0x6f]
1759 ; CHECK: uqshrn2.4s v0, v0, #6 ; encoding: [0x00,0x94,0x3a,0x6f]
1848 uqshrn2 v8.16b, v9.8h, #2
1850 uqshrn2 v6.8h, v7.4s, #4
1852 uqshrn2 v4.4s, v5.2d, #6
1912 ; CHECK: uqshrn2.16b v8, v9, #2 ; encoding: [0x28,0x95,0x0e,0x6f]
[all …]
|
| D | arm64-diags.s | 132 uqshrn2 v4.4s, v5.2d, #67
144 ; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67
|
| D | neon-diagnostics.s | 1955 uqshrn2 v0.16b, v1.8h, #17
1956 uqshrn2 v0.8h, v1.4s, #33
1957 uqshrn2 v0.4s, v1.2d, #65
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-simd-shift.ll | 467 ; CHECK: uqshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3
478 ; CHECK: uqshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9
489 ; CHECK: uqshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
|
| D | arm64-vshift.ll | 1105 ;CHECK: uqshrn2.16b v0, {{v[0-9]+}}, #1
1115 ;CHECK: uqshrn2.8h v0, {{v[0-9]+}}, #1
1125 ;CHECK: uqshrn2.4s v0, {{v[0-9]+}}, #1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-simd-shift.ll | 467 ; CHECK: uqshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3
478 ; CHECK: uqshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9
489 ; CHECK: uqshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
|
| D | arm64-vshift.ll | 1105 ;CHECK: uqshrn2.16b v0, {{v[0-9]+}}, #1
1115 ;CHECK: uqshrn2.8h v0, {{v[0-9]+}}, #1
1125 ;CHECK: uqshrn2.4s v0, {{v[0-9]+}}, #1
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 2158 # CHECK: uqshrn2.16b v0, v0, #0x6
2160 # CHECK: uqshrn2.8h v0, v0, #0xc
2162 # CHECK: uqshrn2.4s v0, v0, #0x1a
|
| D | neon-instructions.txt | 1037 # CHECK: uqshrn2 v0.16b, v1.8h, #3
1038 # CHECK: uqshrn2 v0.8h, v1.4s, #3
1039 # CHECK: uqshrn2 v0.4s, v1.2d, #3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 2158 # CHECK: uqshrn2.16b v0, v0, #0x6
2160 # CHECK: uqshrn2.8h v0, v0, #0xc
2162 # CHECK: uqshrn2.4s v0, v0, #0x1a
|
| D | neon-instructions.txt | 1037 # CHECK: uqshrn2 v0.16b, v1.8h, #3
1038 # CHECK: uqshrn2 v0.8h, v1.4s, #3
1039 # CHECK: uqshrn2 v0.4s, v1.2d, #3
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.h | 1072 V(uqshrn2, Uqshrn2) \
|
| D | simulator-arm64.h | 1804 LogicVRegister uqshrn2(VectorFormat vform, LogicVRegister dst,
|
| D | assembler-arm64.h | 2178 void uqshrn2(const VRegister& vd, const VRegister& vn, int shift);
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 2017 0x~~~~~~~~~~~~~~~~ 6f0a97b0 uqshrn2 v16.16b, v29.8h, #6
2018 0x~~~~~~~~~~~~~~~~ 6f3f94c2 uqshrn2 v2.4s, v6.2d, #1
2019 0x~~~~~~~~~~~~~~~~ 6f129550 uqshrn2 v16.8h, v10.4s, #14
|
| D | log-disasm-colour | 2017 0x~~~~~~~~~~~~~~~~ 6f0a97b0 uqshrn2 v16.16b, v29.8h, #6
2018 0x~~~~~~~~~~~~~~~~ 6f3f94c2 uqshrn2 v2.4s, v6.2d, #1
2019 0x~~~~~~~~~~~~~~~~ 6f129550 uqshrn2 v16.8h, v10.4s, #14
|
| D | log-cpufeatures-custom | 2016 0x~~~~~~~~~~~~~~~~ 6f0a97b0 uqshrn2 v16.16b, v29.8h, #6 ### {NEON} ###
2017 0x~~~~~~~~~~~~~~~~ 6f3f94c2 uqshrn2 v2.4s, v6.2d, #1 ### {NEON} ###
2018 0x~~~~~~~~~~~~~~~~ 6f129550 uqshrn2 v16.8h, v10.4s, #14 ### {NEON} ###
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2359 __ uqshrn2(v16.V16B(), v29.V8H(), 6); in GenerateTestSequenceNEON() local
2360 __ uqshrn2(v2.V4S(), v6.V2D(), 1); in GenerateTestSequenceNEON() local
2361 __ uqshrn2(v16.V8H(), v10.V4S(), 14); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 2664 LogicVRegister uqshrn2(VectorFormat vform,
|