| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 149 define i32 @uqsub8(i32 %a, i32 %b) nounwind {
150 ; CHECK-LABEL: uqsub8
151 ; CHECK: uqsub8 r0, r0, r1
152 %tmp = call i32 @llvm.arm.uqsub8(i32 %a, i32 %b)
442 declare i32 @llvm.arm.uqsub8(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 91 M(uqsub8) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 90 M(uqsub8) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 937 0xf4,0x2f,0x61,0xe6 = uqsub8 r2, r1, r4
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| D | basic-thumb2-instructions.s.cs | 1129 0xc2,0xfa,0x59,0xf8 = uqsub8 r8, r2, r9
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2444 uqsub8 r2, r1, r4
2449 @ CHECK: uqsub8 r2, r1, r4 @ encoding: [0xf4,0x2f,0x61,0xe6]
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| D | basic-thumb2-instructions.s | 2988 uqsub8 r8, r2, r9
2994 @ CHECK: uqsub8 r8, r2, r9 @ encoding: [0xc2,0xfa,0x59,0xf8]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3709 void uqsub8(Condition cond, Register rd, Register rn, Register rm);
3710 void uqsub8(Register rd, Register rn, Register rm) { uqsub8(al, rd, rn, rm); } in uqsub8() function
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| D | disasm-aarch32.h | 1410 void uqsub8(Condition cond, Register rd, Register rn, Register rm);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3541 uqsub8 r8, r2, r9
3547 @ CHECK: uqsub8 r8, r2, r9 @ encoding: [0xc2,0xfa,0x59,0xf8]
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| D | basic-arm-instructions.s | 3364 uqsub8 r2, r1, r4
3369 @ CHECK: uqsub8 r2, r1, r4 @ encoding: [0xf4,0x2f,0x61,0xe6]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3362 uqsub8 r2, r1, r4
3367 @ CHECK: uqsub8 r2, r1, r4 @ encoding: [0xf4,0x2f,0x61,0xe6]
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| D | basic-thumb2-instructions.s | 3485 uqsub8 r8, r2, r9
3491 @ CHECK: uqsub8 r8, r2, r9 @ encoding: [0xc2,0xfa,0x59,0xf8]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2182 # CHECK: uqsub8 r2, r1, r4
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| D | thumb2.txt | 2335 # CHECK: uqsub8 r8, r2, r9
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2486 # CHECK: uqsub8 r8, r2, r9
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| D | basic-arm-instructions.txt | 2355 # CHECK: uqsub8 r2, r1, r4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2355 # CHECK: uqsub8 r2, r1, r4
|
| D | thumb2.txt | 2486 # CHECK: uqsub8 r8, r2, r9
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1951 def t2UQSUB8 : T2I_pam<0b100, 0b0101, "uqsub8">;
|
| D | ARMInstrInfo.td | 3184 def UQSUB8 : AAI<0b01100110, 0b11111111, "uqsub8">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2203 def t2UQSUB8 : T2I_pam_intrinsics<0b100, 0b0101, "uqsub8", int_arm_uqsub8>;
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| D | ARMInstrInfo.td | 3726 def UQSUB8 : AAIIntrinsic<0b01100110, 0b11111111, "uqsub8", int_arm_uqsub8>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2156 def t2UQSUB8 : T2I_pam<0b100, 0b0101, "uqsub8">;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7768 "sx\005uqsax\007uqsub16\006uqsub8\005usad8\006usada8\004usat\006usat16\004"
9071 …{ 1662 /* uqsub8 */, ARM::t2UQSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2…
9072 …{ 1662 /* uqsub8 */, ARM::UQSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { M…
|