/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | acle-intrinsics.ll | 326 define i32 @usax(i32 %a, i32 %b) nounwind { 327 ; CHECK-LABEL: usax 328 ; CHECK: usax r0, r0, r1 329 %tmp = call i32 @llvm.arm.usax(i32 %a, i32 %b) 460 declare i32 @llvm.arm.usax(i32, i32) nounwind
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-a32.cc | 103 M(usax) \
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D | test-assembler-cond-rd-rn-rm-t32.cc | 102 M(usax) \
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/external/capstone/suite/MC/ARM/ |
D | basic-thumb2-instructions.s.cs | 1145 0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4 1148 0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4
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D | basic-arm-instructions.s.cs | 950 0x54,0x2f,0x53,0xe6 = usax r2, r3, r4
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3044 usax r2, r3, r4 3051 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] 3054 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
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D | basic-arm-instructions.s | 2496 usax r2, r3, r4 2499 @ CHECK: usax r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0xe6]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2391 # CHECK: usax r2, r3, r4 2394 # CHECK: usax r2, r3, r4
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D | basic-arm-instructions.txt | 2234 # CHECK: usax r2, r3, r4
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2542 # CHECK: usax r2, r3, r4 2545 # CHECK: usax r2, r3, r4
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D | basic-arm-instructions.txt | 2407 # CHECK: usax r2, r3, r4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2542 # CHECK: usax r2, r3, r4 2545 # CHECK: usax r2, r3, r4
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D | basic-arm-instructions.txt | 2407 # CHECK: usax r2, r3, r4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3597 usax r2, r3, r4 3604 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] 3607 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
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D | basic-arm-instructions.s | 3416 usax r2, r3, r4 3419 @ CHECK: usax r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0xe6]
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3541 usax r2, r3, r4 3548 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] 3551 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
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D | basic-arm-instructions.s | 3414 usax r2, r3, r4 3417 @ CHECK: usax r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0xe6]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3731 void usax(Condition cond, Register rd, Register rn, Register rm); 3732 void usax(Register rd, Register rn, Register rm) { usax(al, rd, rn, rm); } in usax() function
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D | disasm-aarch32.h | 1421 void usax(Condition cond, Register rd, Register rn, Register rm);
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3197 def USAX : AAI<0b01100101, 0b11110101, "usax">; 4993 def : MnemonicAlias<"usubaddx", "usax">;
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D | ARMInstrThumb2.td | 1964 def t2USAX : T2I_pam<0b110, 0b0100, "usax">;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3743 def USAX : AAIIntrinsic<0b01100101, 0b11110101, "usax", int_arm_usax>; 6003 def : MnemonicAlias<"usubaddx", "usax">;
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D | ARMInstrThumb2.td | 2237 def t2USAX : T2I_pam_intrinsics<0b110, 0b0100, "usax", int_arm_usax>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3598 def USAX : AAI<0b01100101, 0b11110101, "usax">; 5703 def : MnemonicAlias<"usubaddx", "usax">;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 1335 Mnemonic = "usax"; // "usubaddx" 7769 "usax\006usub16\005usub8\005uxtab\007uxtab16\005uxtah\004uxtb\006uxtb16\004" 9083 …{ 1694 /* usax */, ARM::t2USAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Fea… 9084 …{ 1694 /* usax */, ARM::USAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_C…
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