| /external/mesa3d/src/compiler/glsl/ |
| D | builtin_functions.cpp | 142 v130(const _mesa_glsl_parse_state *state) in v130() function
248 (v130(state) && state->EXT_shader_integer_mix_enable); in shader_integer_mix()
1297 _##NAME(v130, glsl_type::float_type), \ in create_builtins()
1298 _##NAME(v130, glsl_type::vec2_type), \ in create_builtins()
1299 _##NAME(v130, glsl_type::vec3_type), \ in create_builtins()
1300 _##NAME(v130, glsl_type::vec4_type), \ in create_builtins()
1361 _##NAME(v130, glsl_type::uvec2_type), \ in create_builtins()
1362 _##NAME(v130, glsl_type::uvec3_type), \ in create_builtins()
1363 _##NAME(v130, glsl_type::uvec4_type), \ in create_builtins()
1400 _##NAME(v130, glsl_type::uvec2_type), \ in create_builtins()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | mmx-coalescing.ll | 71 %v130 = bitcast <1 x i64> %vy to <4 x i16>
72 %v131 = bitcast <4 x i16> %v130 to x86_mmx
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| /external/llvm/test/CodeGen/X86/ |
| D | mmx-coalescing.ll | 71 %v130 = bitcast <1 x i64> %vy to <4 x i16>
72 %v131 = bitcast <4 x i16> %v130 to x86_mmx
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | aggr-licm.ll | 150 %v130 = and i64 %v124, 1
153 %v133 = shl i64 %v130, %v132
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| D | swp-epilog-phi7.ll | 157 %v130 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v126, <16 x i32> %v114)
159 %v132 = tail call <32 x i32> @llvm.hexagon.V6.vdmpybus.dv(<32 x i32> %v130, i32 %v28)
161 …%v134 = tail call <32 x i32> @llvm.hexagon.V6.vdmpybus.dv.acc(<32 x i32> %v131, <32 x i32> %v130, …
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| D | registerscavenger-fail1.ll | 247 %v130 = getelementptr i8, i8* %v105, i32 %v129
248 %v131 = bitcast i8* %v130 to double*
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| D | late_instr.ll | 170 %v130 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> %v129, <16 x i32> %v19)
171 store <16 x i32> %v130, <16 x i32>* %v128, align 64, !tbaa !0
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| D | cext-ice.ll | 267 %v130 = load i32, i32* %v9, align 8, !tbaa !0
268 store volatile i32 %v130, i32* %v4, align 4, !tbaa !0
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| D | large-number-of-preds.ll | 210 %v130 = fsub float -0.000000e+00, %v129
212 store float %v130, float* %v131, align 8, !tbaa !0
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| D | opt-glob-addrs-003.ll | 235 …%v130 = load i16, i16* getelementptr inbounds ([10 x i16], [10 x i16]* @g2, i32 0, i32 8), align 2…
236 %v131 = icmp slt i16 %v129, %v130
237 %v132 = select i1 %v131, i16 %v129, i16 %v130
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| D | bug14859-split-const-block-addr.ll | 302 %v130 = phi i8* [ %v127, %b39 ], [ %v115, %b36 ]
307 %v135 = ptrtoint i8* %v130 to i32
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| D | regscavenger_fail_hwloop.ll | 156 %v130 = trunc i32 %v129 to i8
158 store i8 %v130, i8* %v131, align 1, !tbaa !0
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| D | lsr-post-inc-cross-use-offsets.ll | 193 %v130 = load <32 x i32>, <32 x i32>* %v129, align 1, !tbaa !4
198 %v135 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v130, <32 x i32> %v134)
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| D | expand-vstorerw-undef2.ll | 191 %v130 = tail call <32 x i32> @llvm.hexagon.V6.vsubhsat.128B(<32 x i32> undef, <32 x i32> %v129) #2
192 %v131 = tail call <64 x i32> @llvm.hexagon.V6.vaddhw.128B(<32 x i32> %v128, <32 x i32> %v130) #2
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| D | reg-scav-imp-use-dbl-vec.ll | 231 %v130 = getelementptr inbounds i16, i16* %v2, i32 %v129
232 %v131 = bitcast i16* %v130 to <32 x i32>*
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| D | reg-scavengebug-5.ll | 154 …%v130 = tail call <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32> %v128, <32 x i32> undef, i32 …
157 …%v133 = tail call <32 x i32> @llvm.hexagon.V6.vdmpybus.dv.acc(<32 x i32> %v130, <32 x i32> %v127, …
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| D | regscavengerbug.ll | 216 %v130 = fcmp ogt double %v127, %v113
217 %v131 = select i1 %v130, double %v127, double %v113
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| D | concat-vectors-legalize.ll | 187 %v130 = select i1 %v129, i32 %v125, i32 %v128
188 %v131 = icmp slt i32 %v130, %v9
189 %v132 = select i1 %v131, i32 %v9, i32 %v130
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| D | hrc-stack-coloring.ll | 173 %v130 = load double, double* %v18, align 8
175 %v132 = fmul double %v130, %v131
|