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Searched refs:v_min_f32_e32 (Results 1 – 20 of 20) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dfminnum.ll5 ; GCN: v_min_f32_e32
13 ; GCN: v_min_f32_e32
14 ; GCN: v_min_f32_e32
22 ; GCN: v_min_f32_e32
23 ; GCN: v_min_f32_e32
24 ; GCN: v_min_f32_e32
25 ; GCN: v_min_f32_e32
33 ; GCN: v_min_f32_e32
34 ; GCN: v_min_f32_e32
35 ; GCN: v_min_f32_e32
[all …]
Dfmin_legacy.ll16 ; SI-NONAN: v_min_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
33 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, s[[A]], [[VB]]
46 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
65 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
84 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
103 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
122 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
143 ; SI-NONAN: v_min_f32_e32
144 ; SI-NONAN: v_min_f32_e32
164 ; SI-NONAN: v_min_f32_e32
[all …]
Dllvm.minnum.f16.ll15 ; SI: v_min_f32_e32 v[[R_F32:[0-9]+]], v[[A_F32]], v[[B_F32]]
35 ; SI: v_min_f32_e32 v[[R_F32:[0-9]+]], 0x40400000, v[[B_F32]]
53 ; SI: v_min_f32_e32 v[[R_F32:[0-9]+]], 4.0, v[[A_F32]]
78 ; SI-DAG: v_min_f32_e32 v[[R_F32_0:[0-9]+]], v[[A_F32_0]], v[[B_F32_0]]
79 ; SI-DAG: v_min_f32_e32 v[[R_F32_1:[0-9]+]], v[[A_F32_1]], v[[B_F32_1]]
111 ; SI-DAG: v_min_f32_e32 v[[R_F32_0:[0-9]+]], 0x40400000, v[[B_F32_0]]
113 ; SI-DAG: v_min_f32_e32 v[[R_F32_1:[0-9]+]], 4.0, v[[B_F32_1]]
143 ; SI-DAG: v_min_f32_e32 v[[R_F32_0:[0-9]+]], 4.0, v[[A_F32_0]]
145 ; SI-DAG: v_min_f32_e32 v[[R_F32_1:[0-9]+]], 0x40400000, v[[A_F32_1]]
Dfmin3.ll93 ; SI: v_min_f32_e32
94 ; SI-NEXT: v_min_f32_e32
Dllvm.amdgcn.rsq.clamp.ll12 ; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]]
Dfcanonicalize-elimination.ll355 ; GFX9: v_min_f32_e32 [[V:v[0-9]+]], 0, v{{[0-9]+}}
368 ; GCN: v_min_f32_e32 [[V:v[0-9]+]], 0, v{{[0-9]+}}
399 ; GFX9: v_min_f32_e32 [[RESULT:v[0-9]+]], 0x7fffff, v{{[0-9]+}}
400 ; VI: v_min_f32_e32 [[V0:v[0-9]+]], 0x7fffff, v{{[0-9]+}}
Dfmed3.ll29 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
47 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
65 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
81 ; GCN: v_min_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
98 ; GCN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
148 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
876 ; GCN: v_min_f32_e32 v{{[0-9]+}}, [[MAX]], [[C]]
Dclamp.ll73 ; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], 1.0, [[MAX]]
386 ; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], 1.0, [[MAX]]
Dfneg-combines.ll461 ; GCN: v_min_f32_e32 [[RESULT:v[0-9]+]], 0, [[A]]
494 ; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], 0, [[A]]
/external/llvm/test/CodeGen/AMDGPU/
Dfminnum.ll12 ; SI: v_min_f32_e32
23 ; SI: v_min_f32_e32
24 ; SI: v_min_f32_e32
36 ; SI: v_min_f32_e32
37 ; SI: v_min_f32_e32
38 ; SI: v_min_f32_e32
39 ; SI: v_min_f32_e32
53 ; SI: v_min_f32_e32
54 ; SI: v_min_f32_e32
55 ; SI: v_min_f32_e32
[all …]
Dfmin_legacy.ll16 ; SI-NONAN: v_min_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
35 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[A]], [[VB]]
48 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
67 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
86 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
105 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
124 ; SI-NONAN: v_min_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
145 ; SI-NONAN: v_min_f32_e32
146 ; SI-NONAN: v_min_f32_e32
166 ; SI-NONAN: v_min_f32_e32
[all …]
Dfmed3.ll14 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
32 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
50 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
66 ; GCN: v_min_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
83 ; GCN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
133 ; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
Dllvm.AMDGPU.rsq.clamped.ll14 ; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]]
Dllvm.amdgcn.rsq.clamp.ll12 ; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop2.s184 v_min_f32_e32 v1, v2, v3 label
/external/llvm/test/MC/AMDGPU/
Dvop2.s176 v_min_f32_e32 v1, v2, v3 label
/external/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt39 # VI: v_min_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x14]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt39 # VI: v_min_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x14]
Dgfx8_dasm_all.txt32793 # CHECK: v_min_f32_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x14]
32796 # CHECK: v_min_f32_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x15]
32799 # CHECK: v_min_f32_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x14]
32802 # CHECK: v_min_f32_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x14]
32805 # CHECK: v_min_f32_e32 v5, s101, v2 ; encoding: [0x65,0x04,0x0a,0x14]
32808 # CHECK: v_min_f32_e32 v5, flat_scratch_lo, v2 ; encoding: [0x66,0x04,0x0a,0x14]
32811 # CHECK: v_min_f32_e32 v5, flat_scratch_hi, v2 ; encoding: [0x67,0x04,0x0a,0x14]
32814 # CHECK: v_min_f32_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x14]
32817 # CHECK: v_min_f32_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x14]
32820 # CHECK: v_min_f32_e32 v5, tba_lo, v2 ; encoding: [0x6c,0x04,0x0a,0x14]
[all …]
Dgfx9_dasm_all.txt28380 # CHECK: v_min_f32_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x14]
28383 # CHECK: v_min_f32_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x15]
28386 # CHECK: v_min_f32_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x14]
28389 # CHECK: v_min_f32_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x14]
28392 # CHECK: v_min_f32_e32 v5, s101, v2 ; encoding: [0x65,0x04,0x0a,0x14]
28395 # CHECK: v_min_f32_e32 v5, flat_scratch_lo, v2 ; encoding: [0x66,0x04,0x0a,0x14]
28398 # CHECK: v_min_f32_e32 v5, flat_scratch_hi, v2 ; encoding: [0x67,0x04,0x0a,0x14]
28401 # CHECK: v_min_f32_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x14]
28404 # CHECK: v_min_f32_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x14]
28407 # CHECK: v_min_f32_e32 v5, m0, v2 ; encoding: [0x7c,0x04,0x0a,0x14]
[all …]