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Searched refs:v_mov_b32 (Results 1 – 25 of 44) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop_dpp_expr.s8 v_mov_b32 v0, v0 quad_perm:[0+zero,zero-2+two*two,1/one,1] label
11 v_mov_b32 v0, v0 row_shl:two-1 label
14 v_mov_b32 v0, v0 row_shr:0xe+one label
17 v_mov_b32 v0, v0 row_ror:0x6*two label
20 v_mov_b32 v0, v0 wave_shl:two/2 label
23 v_mov_b32 v0, v0 wave_rol:two-one label
26 v_mov_b32 v0, v0 wave_shr:1+zero label
29 v_mov_b32 v0, v0 wave_ror:two*2-3 label
32 v_mov_b32 v0, v0 row_bcast:150/(two*2+zero/one+two*3) label
35 v_mov_b32 v0, v0 quad_perm:[one,two+one,zero,2-one] row_mask:2*5 bank_mask:0x2-one bound_ctrl:1-1 label
Dreloc.s36 v_mov_b32 v0, SCRATCH_RSRC_DWORD0
37 v_mov_b32 v1, SCRATCH_RSRC_DWORD1
38 v_mov_b32 v2, global_var0@GOTPCREL
39 v_mov_b32 v3, global_var1@gotpcrel32@lo
40 v_mov_b32 v4, global_var2@gotpcrel32@hi
41 v_mov_b32 v5, global_var3@rel32@lo
42 v_mov_b32 v6, global_var4@rel32@hi
Dvop_dpp.s16 v_mov_b32 v0, v0 quad_perm:[0,2,1,1] label
20 v_mov_b32 v0, v0 row_shl:1 label
24 v_mov_b32 v0, v0 row_shr:0xf label
28 v_mov_b32 v0, v0 row_ror:0xc label
32 v_mov_b32 v0, v0 wave_shl:1 label
36 v_mov_b32 v0, v0 wave_rol:1 label
40 v_mov_b32 v0, v0 wave_shr:1 label
44 v_mov_b32 v0, v0 wave_ror:1 label
48 v_mov_b32 v0, v0 row_mirror label
52 v_mov_b32 v0, v0 row_half_mirror label
[all …]
Ddata.s6 v_mov_b32 v7, s24
7 v_mov_b32 v8, s25
Dvop3-convert.s11 v_mov_b32 [v1], [v2] label
14 v_mov_b32 v0, 0.5 label
20 v_mov_b32 v1, ttmp8 label
25 v_mov_b32 v1, v2 label
Dvop_sdwa.s16 v_mov_b32 v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD label
20 v_mov_b32 v3, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 label
24 v_mov_b32 v15, v99 dst_sel:BYTE_2 dst_unused:UNUSED_SEXT src0_sel:WORD_0 label
60 v_mov_b32 v1, v0 clamp src0_sel:WORD_1 label
141 v_mov_b32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 label
707 v_mov_b32 v1, s2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD label
712 v_mov_b32 v1, exec dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD label
/external/llvm/test/MC/AMDGPU/
Dvop_dpp.s12 v_mov_b32 v0, v0 quad_perm:[0,2,1,1] label
16 v_mov_b32 v0, v0 row_shl:1 label
20 v_mov_b32 v0, v0 row_shr:0xf label
24 v_mov_b32 v0, v0 row_ror:0xc label
28 v_mov_b32 v0, v0 wave_shl:1 label
32 v_mov_b32 v0, v0 wave_rol:1 label
36 v_mov_b32 v0, v0 wave_shr:1 label
40 v_mov_b32 v0, v0 wave_ror:1 label
44 v_mov_b32 v0, v0 row_mirror label
48 v_mov_b32 v0, v0 row_half_mirror label
[all …]
Dvop_sdwa.s18 v_mov_b32 v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD label
22 v_mov_b32 v3, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 label
26 v_mov_b32 v15, v99 dst_sel:BYTE_2 dst_unused:UNUSED_SEXT src0_sel:WORD_0 label
61 v_mov_b32 v1, v0 clamp src0_sel:WORD_1 label
141 v_mov_b32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 label
Dtrap.s65 v_mov_b32 v1, ttmp8 label
Dreg-syntax-extra.s46 v_mov_b32 [v1], [v2] label
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dbitcast-vector-extract.ll10 ; GCN-NOT: v_mov_b32
12 ; GCN-NOT: v_mov_b32
26 ; GCN-NOT: v_mov_b32
28 ; GCN-NOT: v_mov_b32
42 ; GCN-NOT: v_mov_b32
44 ; GCN-NOT: v_mov_b32
58 ; GCN-NOT: v_mov_b32
60 ; GCN-NOT: v_mov_b32
Dinlineasm-16.ll15 ; GCN: v_mov_b32 v[[REG:[0-9]+]], -1
18 %v = tail call i16 asm sideeffect "v_mov_b32 $0, -1", "=v"() #0
33 ; GCN: v_mov_b32 v[[REG:[0-9]+]], -1
36 %v = tail call half asm sideeffect "v_mov_b32 $0, -1", "=v"() #0
Dmove-addr64-rsrc-dead-subreg-writes.ll11 ; GCN-NOT: v_mov_b32
14 ; GCN-NOT: v_mov_b32
16 ; GCN-NOT: v_mov_b32
Dllvm.amdgcn.mqsad.u32.u8.ll12 %tmp1 = call i32 asm "v_mov_b32 $0, $1", "={v4},v"(i32 %a) #0
25 %tmp1 = call i32 asm "v_mov_b32 $0, $1", "={v4},v"(i32 %a) #0
38 %tmp1 = call i32 asm "v_mov_b32 $0, $1", "={v4},v"(i32 %a) #0
52 %tmp1 = call i32 asm "v_mov_b32 $0, $1", "={v4},v"(i32 %a) #0
Dinlineasm-packed.ll31 ; GCN: v_mov_b32 v{{[0-9]+}}, s{{[0-9]+}}
34 %val = call <2 x half> asm "v_mov_b32 $0, $1", "=v,r"(i32 %in) #0
Dinlineasm-illegal-type.ll16 %v = tail call i8 asm sideeffect "v_mov_b32 $0, -1", "=v"()
42 %v = tail call <2 x half> asm sideeffect "v_mov_b32 $0, -1", "=v"()
Dtrunc-combine.ll27 ; GCN-NOT: v_mov_b32
44 ; GCN-NOT: v_mov_b32
Dllvm.amdgcn.qsad.pk.u16.u8.ll24 %tmp1 = call i32 asm "v_mov_b32 $0, $1", "={v4},v"(i32 %a) #0
Dllvm.amdgcn.mqsad.pk.u16.u8.ll24 %tmp1 = call i32 asm "v_mov_b32 $0, $1", "={v4},v"(i32 %a) #0
/external/llvm/test/MC/AMDGPU/regression/
Dbug28538.s8 v_mov_b32 v0, v0 row_bcast:0 label
12 v_mov_b32 v0, v0 row_bcast:13 label
Dbug28413.s22 v_mov_b32 v0, 0.5 label
25 v_mov_b32 v0, 3.125 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/regression/
Dbug28538.s8 v_mov_b32 v0, v0 row_bcast:0 label
12 v_mov_b32 v0, v0 row_bcast:13 label
/external/llvm/test/CodeGen/AMDGPU/
Dmove-addr64-rsrc-dead-subreg-writes.ll12 ; GCN-NOT: v_mov_b32
14 ; GCN-NOT: v_mov_b32
16 ; GCN-NOT: v_mov_b32
/external/llvm/docs/
DAMDGPUUsage.rst198 v_mov_b32 v0, 3.14159
200 v_mov_b32 v1, s0
201 v_mov_b32 v2, s1
/external/clang/test/Sema/
Dinline-asm-validate-amdgpu.cl13 __asm__ ("v_mov_b32 %0, %1" : "=v" (vgpr) : "v" (imm) : );

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