| /external/capstone/suite/MC/ARM/ |
| D | neon-cmp-encoding.s.cs | 24 0xb1,0x0e,0x40,0xf3 = vacge.f32 d16, d16, d17
25 0xf2,0x0e,0x40,0xf3 = vacge.f32 q8, q8, q9
85 0xf6,0x2e,0x48,0xf3 = vacge.f32 q9, q12, q11
86 0x1b,0x9e,0x0c,0xf3 = vacge.f32 d9, d12, d11
87 0xf6,0x6e,0x48,0xf3 = vacge.f32 q11, q12, q11
88 0x1b,0xbe,0x0c,0xf3 = vacge.f32 d11, d12, d11
|
| D | neon-bitwise-encoding.s.cs | 123 0x3e,0x5e,0x05,0xf3 = vacge.f32 d5, d5, d30
124 0x56,0xae,0x0a,0xf3 = vacge.f32 q5, q5, q3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | neon-cmp-encoding.s | 35 vacge.f32 d16, d16, d17
36 vacge.f32 q8, q8, q9
52 @ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3]
53 @ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3]
194 @ CHECK: vacge.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x48,0xf3]
195 @ CHECK: vacge.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x0c,0xf3]
196 @ CHECK: vacge.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x48,0xf3]
197 @ CHECK: vacge.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x0c,0xf3]
|
| D | fullfp16-neon.s | 144 vacge.f16 d0, d1, d2
145 vacge.f16 q0, q1, q2
146 @ ARM: vacge.f16 d0, d1, d2 @ encoding: [0x12,0x0e,0x11,0xf3]
147 @ ARM: vacge.f16 q0, q1, q2 @ encoding: [0x54,0x0e,0x12,0xf3]
148 @ THUMB: vacge.f16 d0, d1, d2 @ encoding: [0x11,0xff,0x12,0x0e]
149 @ THUMB: vacge.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0e]
160 @ ARM: vacge.f16 d0, d2, d1 @ encoding: [0x11,0x0e,0x12,0xf3]
161 @ ARM: vacge.f16 q0, q2, q1 @ encoding: [0x52,0x0e,0x14,0xf3]
162 @ THUMB: vacge.f16 d0, d2, d1 @ encoding: [0x12,0xff,0x11,0x0e]
163 @ THUMB: vacge.f16 q0, q2, q1 @ encoding: [0x14,0xff,0x52,0x0e]
|
| D | neon-bitwise-encoding.s | 328 vacge.f32 d5, d30
329 vacge.f32 q5, q3
|
| D | fullfp16-neon-neg.s | 106 vacge.f16 d0, d1, d2
107 vacge.f16 q0, q1, q2
|
| /external/llvm/test/MC/ARM/ |
| D | neon-cmp-encoding.s | 35 vacge.f32 d16, d16, d17
36 vacge.f32 q8, q8, q9
52 @ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3]
53 @ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3]
194 @ CHECK: vacge.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x48,0xf3]
195 @ CHECK: vacge.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x0c,0xf3]
196 @ CHECK: vacge.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x48,0xf3]
197 @ CHECK: vacge.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x0c,0xf3]
|
| D | fullfp16-neon.s | 144 vacge.f16 d0, d1, d2
145 vacge.f16 q0, q1, q2
146 @ ARM: vacge.f16 d0, d1, d2 @ encoding: [0x12,0x0e,0x11,0xf3]
147 @ ARM: vacge.f16 q0, q1, q2 @ encoding: [0x54,0x0e,0x12,0xf3]
148 @ THUMB: vacge.f16 d0, d1, d2 @ encoding: [0x11,0xff,0x12,0x0e]
149 @ THUMB: vacge.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0e]
160 @ ARM: vacge.f16 d0, d2, d1 @ encoding: [0x11,0x0e,0x12,0xf3]
161 @ ARM: vacge.f16 q0, q2, q1 @ encoding: [0x52,0x0e,0x14,0xf3]
162 @ THUMB: vacge.f16 d0, d2, d1 @ encoding: [0x12,0xff,0x11,0x0e]
163 @ THUMB: vacge.f16 q0, q2, q1 @ encoding: [0x14,0xff,0x52,0x0e]
|
| D | fullfp16-neon-neg.s | 106 vacge.f16 d0, d1, d2
107 vacge.f16 q0, q1, q2
|
| D | neon-bitwise-encoding.s | 328 vacge.f32 d5, d30
329 vacge.f32 q5, q3
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neon-cmp-encoding.s | 35 vacge.f32 d16, d16, d17
36 vacge.f32 q8, q8, q9
52 @ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3]
53 @ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vcge.ll | 145 ;CHECK: vacge.f32
148 %tmp3 = call <2 x i32> @llvm.arm.neon.vacge.v2i32.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
154 ;CHECK: vacge.f32
157 %tmp3 = call <4 x i32> @llvm.arm.neon.vacge.v4i32.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
161 declare <2 x i32> @llvm.arm.neon.vacge.v2i32.v2f32(<2 x float>, <2 x float>) nounwind readnone
162 declare <4 x i32> @llvm.arm.neon.vacge.v4i32.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | vcge.ll | 145 ;CHECK: vacge.f32
148 %tmp3 = call <2 x i32> @llvm.arm.neon.vacge.v2i32.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
154 ;CHECK: vacge.f32
157 %tmp3 = call <4 x i32> @llvm.arm.neon.vacge.v4i32.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
161 declare <2 x i32> @llvm.arm.neon.vacge.v2i32.v2f32(<2 x float>, <2 x float>) nounwind readnone
162 declare <4 x i32> @llvm.arm.neon.vacge.v4i32.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | vcge.ll | 145 ;CHECK: vacge.f32
154 ;CHECK: vacge.f32
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | fullfp16-neon-thumb.txt | 94 # CHECK: vacge.f16 d0, d1, d2
95 # CHECK: vacge.f16 q0, q1, q2
|
| D | fullfp16-neon-arm.txt | 94 # CHECK: vacge.f16 d0, d1, d2
95 # CHECK: vacge.f16 q0, q1, q2
|
| D | neon.txt | 362 # CHECK: vacge.f32 d16, d16, d17
363 # CHECK: vacge.f32 q8, q8, q9
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fullfp16-neon-thumb.txt | 94 # CHECK: vacge.f16 d0, d1, d2
95 # CHECK: vacge.f16 q0, q1, q2
|
| D | fullfp16-neon-arm.txt | 94 # CHECK: vacge.f16 d0, d1, d2
95 # CHECK: vacge.f16 q0, q1, q2
|
| D | neon.txt | 362 # CHECK: vacge.f32 d16, d16, d17
363 # CHECK: vacge.f32 q8, q8, q9
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3834 void vacge(
3836 void vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacge() function
3837 vacge(al, dt, rd, rn, rm); in vacge()
3840 void vacge(
3842 void vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacge() function
3843 vacge(al, dt, rd, rn, rm); in vacge()
|
| D | disasm-aarch32.h | 1472 void vacge(
1475 void vacge(
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | neon.txt | 362 # CHECK: vacge.f32 d16, d16, d17
363 # CHECK: vacge.f32 q8, q8, q9
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7770 "uxth\004vaba\005vabal\004vabd\005vabdl\004vabs\005vacge\005vacgt\005vac"
9189 …{ 1776 /* vacge */, ARM::VACGEfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, {…
9190 …{ 1776 /* vacge */, ARM::VACGEfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, {…
9191 …{ 1776 /* vacge */, ARM::VACGEhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Fe…
9192 …{ 1776 /* vacge */, ARM::VACGEhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Fe…
9193 …{ 1776 /* vacge */, ARM::VACGEfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, {…
9194 …{ 1776 /* vacge */, ARM::VACGEfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, {…
9195 …{ 1776 /* vacge */, ARM::VACGEhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Fe…
9196 …{ 1776 /* vacge */, ARM::VACGEhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Fe…
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 558 let InstName = "vacge" in {
|