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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvadd.ll95 ;CHECK: vaddhn.i16
98 %tmp3 = call <8 x i8> @llvm.arm.neon.vaddhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
104 ;CHECK: vaddhn.i32
107 %tmp3 = call <4 x i16> @llvm.arm.neon.vaddhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
113 ;CHECK: vaddhn.i64
116 %tmp3 = call <2 x i32> @llvm.arm.neon.vaddhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
120 declare <8 x i8> @llvm.arm.neon.vaddhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
121 declare <4 x i16> @llvm.arm.neon.vaddhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
122 declare <2 x i32> @llvm.arm.neon.vaddhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-add-encoding.s127 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04]
128 vaddhn.i16 d16, q8, q9
129 @ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xef,0xa2,0x04]
130 vaddhn.i32 d16, q8, q9
131 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xef,0xa2,0x04]
132 vaddhn.i64 d16, q8, q9
Dneon-add-encoding.s126 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf2]
127 vaddhn.i16 d16, q8, q9
128 @ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf2]
129 vaddhn.i32 d16, q8, q9
130 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf2]
131 vaddhn.i64 d16, q8, q9
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dneont2-add-encoding.s127 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04]
128 vaddhn.i16 d16, q8, q9
129 @ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xef,0xa2,0x04]
130 vaddhn.i32 d16, q8, q9
131 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xef,0xa2,0x04]
132 vaddhn.i64 d16, q8, q9
Dneon-add-encoding.s223 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf2]
224 vaddhn.i16 d16, q8, q9
225 @ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf2]
226 vaddhn.i32 d16, q8, q9
227 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf2]
228 vaddhn.i64 d16, q8, q9
/external/llvm/test/MC/ARM/
Dneont2-add-encoding.s127 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04]
128 vaddhn.i16 d16, q8, q9
129 @ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xef,0xa2,0x04]
130 vaddhn.i32 d16, q8, q9
131 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xef,0xa2,0x04]
132 vaddhn.i64 d16, q8, q9
Dneon-add-encoding.s223 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf2]
224 vaddhn.i16 d16, q8, q9
225 @ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf2]
226 vaddhn.i32 d16, q8, q9
227 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf2]
228 vaddhn.i64 d16, q8, q9
/external/capstone/suite/MC/ARM/
Dneont2-add-encoding.s.cs60 0xc0,0xef,0xa2,0x04 = vaddhn.i16 d16, q8, q9
61 0xd0,0xef,0xa2,0x04 = vaddhn.i32 d16, q8, q9
62 0xe0,0xef,0xa2,0x04 = vaddhn.i64 d16, q8, q9
Dneon-add-encoding.s.cs100 0xa2,0x04,0xc0,0xf2 = vaddhn.i16 d16, q8, q9
101 0xa2,0x04,0xd0,0xf2 = vaddhn.i32 d16, q8, q9
102 0xa2,0x04,0xe0,0xf2 = vaddhn.i64 d16, q8, q9
/external/arm-neon-tests/
Dref_vaddhn.c45 #define INSN_NAME vaddhn
DMakefile.gcc56 vqdmlsl_n vsri_n vsli_n vtst vaddhn vraddhn vaddl vaddw \
DMakefile50 vqdmlsl_n vsri_n vsli_n vtst vaddhn vraddhn vaddl vaddw \
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-3vdiff.ll549 %vaddhn.i = add <8 x i16> %a, %b
550 %vaddhn1.i = lshr <8 x i16> %vaddhn.i, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
559 %vaddhn.i = add <4 x i32> %a, %b
560 %vaddhn1.i = lshr <4 x i32> %vaddhn.i, <i32 16, i32 16, i32 16, i32 16>
569 %vaddhn.i = add <2 x i64> %a, %b
570 %vaddhn1.i = lshr <2 x i64> %vaddhn.i, <i64 32, i64 32>
579 %vaddhn.i = add <8 x i16> %a, %b
580 %vaddhn1.i = lshr <8 x i16> %vaddhn.i, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
589 %vaddhn.i = add <4 x i32> %a, %b
590 %vaddhn1.i = lshr <4 x i32> %vaddhn.i, <i32 16, i32 16, i32 16, i32 16>
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-3vdiff.ll549 %vaddhn.i = add <8 x i16> %a, %b
550 %vaddhn1.i = lshr <8 x i16> %vaddhn.i, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
559 %vaddhn.i = add <4 x i32> %a, %b
560 %vaddhn1.i = lshr <4 x i32> %vaddhn.i, <i32 16, i32 16, i32 16, i32 16>
569 %vaddhn.i = add <2 x i64> %a, %b
570 %vaddhn1.i = lshr <2 x i64> %vaddhn.i, <i64 32, i64 32>
579 %vaddhn.i = add <8 x i16> %a, %b
580 %vaddhn1.i = lshr <8 x i16> %vaddhn.i, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
589 %vaddhn.i = add <4 x i32> %a, %b
590 %vaddhn1.i = lshr <4 x i32> %vaddhn.i, <i32 16, i32 16, i32 16, i32 16>
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvadd.ll126 ; CHECK: vaddhn.i16
135 ; CHECK: vaddhn.i32
144 ; CHECK: vaddhn.i64
/external/llvm/test/CodeGen/ARM/
Dvadd.ll126 ; CHECK: vaddhn.i16
135 ; CHECK: vaddhn.i32
144 ; CHECK: vaddhn.i64
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt236 # CHECK: vaddhn.i16 d16, q8, q9
238 # CHECK: vaddhn.i32 d16, q8, q9
240 # CHECK: vaddhn.i64 d16, q8, q9
Dneon.txt239 # CHECK: vaddhn.i16 d16, q8, q9
241 # CHECK: vaddhn.i32 d16, q8, q9
243 # CHECK: vaddhn.i64 d16, q8, q9
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dneont2.txt236 # CHECK: vaddhn.i16 d16, q8, q9
238 # CHECK: vaddhn.i32 d16, q8, q9
240 # CHECK: vaddhn.i64 d16, q8, q9
Dneon.txt239 # CHECK: vaddhn.i16 d16, q8, q9
241 # CHECK: vaddhn.i32 d16, q8, q9
243 # CHECK: vaddhn.i64 d16, q8, q9
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt236 # CHECK: vaddhn.i16 d16, q8, q9
238 # CHECK: vaddhn.i32 d16, q8, q9
240 # CHECK: vaddhn.i64 d16, q8, q9
Dneon.txt239 # CHECK: vaddhn.i16 d16, q8, q9
241 # CHECK: vaddhn.i32 d16, q8, q9
243 # CHECK: vaddhn.i64 d16, q8, q9
/external/clang/include/clang/Basic/
Darm_neon.td428 def OP_ADDHNHi : Op<(call "vcombine", $p0, (call "vaddhn", $p1, $p2))>;
514 def VADDHN : IInst<"vaddhn", "hkk", "silUsUiUl">;
/external/vixl/src/aarch32/
Dassembler-aarch32.h3900 void vaddhn(
3902 void vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { in vaddhn() function
3903 vaddhn(al, dt, rd, rn, rm); in vaddhn()
Ddisasm-aarch32.h1505 void vaddhn(

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