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Searched refs:val_4 (Results 1 – 5 of 5) sorted by relevance

/external/libaom/libaom/aom_dsp/arm/
Dloopfilter_neon.c177 const int8x8_t val_4 = vdup_n_s8(4); in lpf_14_neon() local
206 filter1_s8 = vqadd_s8(filter_s8, val_4); in lpf_14_neon()
358 const int8x8_t val_4 = vdup_n_s8(4); in lpf_8_neon() local
387 filter1_s8 = vqadd_s8(filter_s8, val_4); in lpf_8_neon()
473 const int8x8_t val_4 = vdup_n_s8(4); in lpf_6_neon() local
502 filter1_s8 = vqadd_s8(filter_s8, val_4); in lpf_6_neon()
568 const int8x8_t val_4 = vdup_n_s8(4); in lpf_4_neon() local
600 filter1_s8 = vqadd_s8(filter_s8, val_4); in lpf_4_neon()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr18344.ll76 %val_4 = load float, float* %ptrcast_4, align 4
89 store float %val_4, float* %ptrcast1_4, align 4
D2011-11-22-AVX2-Domains.ll42 %val_4.i21290 = load i16, i16* undef, align 2
43 %2 = insertelement <8 x i16> undef, i16 %val_4.i21290, i32 4
/external/libhevc/common/arm/
Dihevc_resi_trans_neon_32x32.c360 int32x4x2_t val_4 = vzipq_s32(a[12].val[1], a[28].val[1]); in ihevc_resi_trans_32x32_neon() local
363 vst1_s32(pi4_temp + 128, vget_low_s32(val_4.val[0])); /*Value 4*/ in ihevc_resi_trans_32x32_neon()
364 vst1_s32(pi4_temp + 384, vget_high_s32(val_4.val[0])); /*Value 12*/ in ihevc_resi_trans_32x32_neon()
365 vst1_s32(pi4_temp + 640, vget_low_s32(val_4.val[1])); /*Value 20*/ in ihevc_resi_trans_32x32_neon()
366 vst1_s32(pi4_temp + 896, vget_high_s32(val_4.val[1])); /*Value 28*/ in ihevc_resi_trans_32x32_neon()
1234 int16x4_t val_4 = vrshrn_n_s32(a[4], 15); in ihevc_resi_trans_32x32_neon() local
1236 vst1_lane_s16(pi2_dst + 4 * dst_strd, val_4, 0); /*Value 4*/ in ihevc_resi_trans_32x32_neon()
1237 vst1_lane_s16(pi2_dst + 12 * dst_strd, val_4, 1); /*Value 12*/ in ihevc_resi_trans_32x32_neon()
1238 vst1_lane_s16(pi2_dst + 20 * dst_strd, val_4, 2); /*Value 20*/ in ihevc_resi_trans_32x32_neon()
1239 vst1_lane_s16(pi2_dst + 28 * dst_strd, val_4, 3); /*Value 28*/ in ihevc_resi_trans_32x32_neon()
/external/llvm/test/CodeGen/X86/
D2011-11-22-AVX2-Domains.ll42 %val_4.i21290 = load i16, i16* undef, align 2
43 %2 = insertelement <8 x i16> undef, i16 %val_4.i21290, i32 4