| /external/libvpx/libvpx/vpx_dsp/arm/ |
| D | loopfilter_16_neon.asm | 546 vbif d18, d5, d16 ; t_op2 |= p2 & ~(flat & mask)
547 vbif d19, d25, d16 ; t_op1 |= f_op1 & ~(flat & mask)
548 vbif d20, d24, d16 ; t_op0 |= f_op0 & ~(flat & mask)
549 vbif d21, d23, d16 ; t_oq0 |= f_oq0 & ~(flat & mask)
550 vbif d22, d26, d16 ; t_oq1 |= f_oq1 & ~(flat & mask)
553 vbif d23, d10, d16 ; t_oq2 |= q2 & ~(flat & mask)
594 vbif d26, d4, d17 ; op3 |= p3 & ~(f2 & f & m)
601 vbif d27, d18, d17 ; op2 |= t_op2 & ~(f2 & f & m)
608 vbif d18, d19, d17 ; op1 |= t_op1 & ~(f2 & f & m)
615 vbif d19, d20, d17 ; op0 |= t_op0 & ~(f2 & f & m)
[all …]
|
| /external/libvpx/config/arm-neon/vpx_dsp/arm/ |
| D | loopfilter_16_neon.asm.S | 562 vbif d18, d5, d16 @ t_op2 |= p2 & ~(flat & mask)
563 vbif d19, d25, d16 @ t_op1 |= f_op1 & ~(flat & mask)
564 vbif d20, d24, d16 @ t_op0 |= f_op0 & ~(flat & mask)
565 vbif d21, d23, d16 @ t_oq0 |= f_oq0 & ~(flat & mask)
566 vbif d22, d26, d16 @ t_oq1 |= f_oq1 & ~(flat & mask)
569 vbif d23, d10, d16 @ t_oq2 |= q2 & ~(flat & mask)
610 vbif d26, d4, d17 @ op3 |= p3 & ~(f2 & f & m)
617 vbif d27, d18, d17 @ op2 |= t_op2 & ~(f2 & f & m)
624 vbif d18, d19, d17 @ op1 |= t_op1 & ~(f2 & f & m)
631 vbif d19, d20, d17 @ op0 |= t_op0 & ~(f2 & f & m)
[all …]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | neon-tests.txt | 3 # CHECK: vbif q15, q7, q0
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | neon-tests.txt | 3 # CHECK: vbif q15, q7, q0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | neon-tests.txt | 3 # CHECK: vbif q15, q7, q0
|
| /external/libavc/common/arm/ |
| D | ih264_deblk_luma_a9.s | 176 vbif q8, q3, q12 @Q8 = (i_macro >= 0 ) ? (p0+delta) : (p0-delta)
177 vbif q0, q7, q12 @Q0 = (i_macro >= 0 ) ? (q0-delta) : (q0+delta)
293 vbif q2, q8, q9 @choose q0 or filtered q0
|
| D | ih264_deblk_chroma_a9.s | 320 vbif q8, q2, q4 @Q8 = (i_macro >= 0 ) ? (p0+delta) : (p0-delta)
321 vbif q0, q9, q4 @Q0 = (i_macro >= 0 ) ? (q0-delta) : (q0+delta)
962 vbif q8, q2, q4 @Q8 = (i_macro >= 0 ) ? (p0+delta) : (p0-delta)
963 vbif q0, q9, q4 @Q0 = (i_macro >= 0 ) ? (q0-delta) : (q0+delta)
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3954 void vbif(
3956 void vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vbif() function
3957 vbif(al, dt, rd, rn, rm); in vbif()
3959 void vbif(DRegister rd, DRegister rn, DRegister rm) { in vbif() function
3960 vbif(al, kDataTypeValueNone, rd, rn, rm); in vbif()
3962 void vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) { in vbif() function
3963 vbif(cond, kDataTypeValueNone, rd, rn, rm); in vbif()
3966 void vbif(
3968 void vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vbif() function
3969 vbif(al, dt, rd, rn, rm); in vbif()
[all …]
|
| D | disasm-aarch32.h | 1538 void vbif(
1541 void vbif(
|
| D | disasm-aarch32.cc | 4003 void Disassembler::vbif( in vbif() function in vixl::aarch32::Disassembler
4014 void Disassembler::vbif( in vbif() function in vixl::aarch32::Disassembler
29728 vbif(CurrentCond(), in DecodeT32()
30396 vbif(CurrentCond(), in DecodeT32()
39592 vbif(al, in DecodeA32()
39820 vbif(al, in DecodeA32()
|
| D | assembler-aarch32.cc | 14851 void Assembler::vbif( in vbif() function in vixl::aarch32::Assembler
14872 Delegate(kVbif, &Assembler::vbif, cond, dt, rd, rn, rm); in vbif()
14875 void Assembler::vbif( in vbif() function in vixl::aarch32::Assembler
14896 Delegate(kVbif, &Assembler::vbif, cond, dt, rd, rn, rm); in vbif()
|
| D | macro-assembler-aarch32.h | 5698 vbif(cond, dt, rd, rn, rm); in Vbif()
5719 vbif(cond, dt, rd, rn, rm); in Vbif()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7771 "le\005vaclt\004vadd\006vaddhn\005vaddl\005vaddw\004vand\004vbic\004vbif"
9312 …{ 1834 /* vbif */, ARM::VBIFq, Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_Has…
9313 …{ 1834 /* vbif */, ARM::VBIFd, Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_Has…
9314 …{ 1834 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
9315 …{ 1834 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
9316 …{ 1834 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
9317 …{ 1834 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
9318 …{ 1834 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
9319 …{ 1834 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
9320 …{ 1834 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0, Feature_Has…
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 5085 // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst",
5090 "vbif", "$Vd, $Vn, $Vm", "$src1 = $Vd",
5095 "vbif", "$Vd, $Vn, $Vm", "$src1 = $Vd",
8111 defm : NEONDTAnyInstAlias<"vbif${p}", "$Vd, $Vn, $Vm",
8117 defm : NEONDTAnyInstAlias<"vbif${p}", "$Vd, $Vn, $Vm",
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 5359 // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst",
5364 "vbif", "$Vd, $Vn, $Vm", "$src1 = $Vd",
5369 "vbif", "$Vd, $Vn, $Vm", "$src1 = $Vd",
8475 defm : NEONDTAnyInstAlias<"vbif${p}", "$Vd, $Vn, $Vm",
8481 defm : NEONDTAnyInstAlias<"vbif${p}", "$Vd, $Vn, $Vm",
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3909 // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst",
3914 "vbif", "$Vd, $Vn, $Vm", "$src1 = $Vd",
3919 "vbif", "$Vd, $Vn, $Vm", "$src1 = $Vd",
|