/external/llvm/test/MC/ARM/ |
D | neon-mul-encoding.s | 3 vmul.i8 d16, d16, d17 4 vmul.i16 d16, d16, d17 5 vmul.i32 d16, d16, d17 6 vmul.f32 d16, d16, d17 7 vmul.i8 q8, q8, q9 8 vmul.i16 q8, q8, q9 9 vmul.i32 q8, q8, q9 10 vmul.f32 q8, q8, q9 11 vmul.p8 d16, d16, d17 12 vmul.p8 q8, q8, q9 [all …]
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D | neont2-mul-encoding.s | 5 vmul.i8 d16, d16, d17 6 vmul.i16 d16, d16, d17 7 vmul.i32 d16, d16, d17 8 vmul.f32 d16, d16, d17 9 vmul.i8 q8, q8, q9 10 vmul.i16 q8, q8, q9 11 vmul.i32 q8, q8, q9 12 vmul.f32 q8, q8, q9 13 vmul.p8 d16, d16, d17 14 vmul.p8 q8, q8, q9 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | neon-mul-encoding.s | 3 vmul.i8 d16, d16, d17 4 vmul.i16 d16, d16, d17 5 vmul.i32 d16, d16, d17 6 vmul.f32 d16, d16, d17 7 vmul.i8 q8, q8, q9 8 vmul.i16 q8, q8, q9 9 vmul.i32 q8, q8, q9 10 vmul.f32 q8, q8, q9 11 vmul.p8 d16, d16, d17 12 vmul.p8 q8, q8, q9 [all …]
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D | neont2-mul-encoding.s | 5 vmul.i8 d16, d16, d17 6 vmul.i16 d16, d16, d17 7 vmul.i32 d16, d16, d17 8 vmul.f32 d16, d16, d17 9 vmul.i8 q8, q8, q9 10 vmul.i16 q8, q8, q9 11 vmul.i32 q8, q8, q9 12 vmul.f32 q8, q8, q9 13 vmul.p8 d16, d16, d17 14 vmul.p8 q8, q8, q9 [all …]
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/external/capstone/suite/MC/ARM/ |
D | neon-mul-encoding.s.cs | 2 0xb1,0x09,0x40,0xf2 = vmul.i8 d16, d16, d17 3 0xb1,0x09,0x50,0xf2 = vmul.i16 d16, d16, d17 4 0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17 5 0xb1,0x0d,0x40,0xf3 = vmul.f32 d16, d16, d17 6 0xf2,0x09,0x40,0xf2 = vmul.i8 q8, q8, q9 7 0xf2,0x09,0x50,0xf2 = vmul.i16 q8, q8, q9 8 0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9 9 0xf2,0x0d,0x40,0xf3 = vmul.f32 q8, q8, q9 10 0xb1,0x09,0x40,0xf3 = vmul.p8 d16, d16, d17 11 0xf2,0x09,0x40,0xf3 = vmul.p8 q8, q8, q9 [all …]
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D | neont2-mul-encoding.s.cs | 2 0x40,0xef,0xb1,0x09 = vmul.i8 d16, d16, d17 3 0x50,0xef,0xb1,0x09 = vmul.i16 d16, d16, d17 4 0x60,0xef,0xb1,0x09 = vmul.i32 d16, d16, d17 5 0x40,0xff,0xb1,0x0d = vmul.f32 d16, d16, d17 6 0x40,0xef,0xf2,0x09 = vmul.i8 q8, q8, q9 7 0x50,0xef,0xf2,0x09 = vmul.i16 q8, q8, q9 8 0x60,0xef,0xf2,0x09 = vmul.i32 q8, q8, q9 9 0x40,0xff,0xf2,0x0d = vmul.f32 q8, q8, q9 10 0x40,0xff,0xb1,0x09 = vmul.p8 d16, d16, d17 11 0x40,0xff,0xf2,0x09 = vmul.p8 q8, q8, q9 [all …]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | neont2-mul-encoding.s | 5 @ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09] 6 vmul.i8 d16, d16, d17 7 @ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09] 8 vmul.i16 d16, d16, d17 9 @ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09] 10 vmul.i32 d16, d16, d17 11 @ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d] 12 vmul.f32 d16, d16, d17 13 @ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09] 14 vmul.i8 q8, q8, q9 [all …]
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/external/llvm/test/CodeGen/ARM/ |
D | neon-spfp.ll | 47 ; CHECK-LINUXA5: vmul.f32 s{{[0-9]*}} 48 ; CHECK-LINUXA8: vmul.f32 s{{[0-9]*}} 49 ; CHECK-LINUXA9: vmul.f32 s{{[0-9]*}} 50 ; CHECK-LINUXA15: vmul.f32 s{{[0-9]*}} 52 ; CHECK-LINUXSWIFT: vmul.f32 d{{[0-9]*}} 54 ; CHECK-UNSAFEA5: vmul.f32 d{{[0-9]*}} 55 ; CHECK-UNSAFEA8: vmul.f32 d{{[0-9]*}} 57 ; CHECK-UNSAFEA9: vmul.f32 s{{[0-9]*}} 58 ; CHECK-UNSAFEA15: vmul.f32 s{{[0-9]*}} 59 ; CHECK-UNSAFESWIFT: vmul.f32 d{{[0-9]*}} [all …]
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D | fmacs.ll | 16 ; A8: vmul.f32 32 ; A8: vmul.f64 48 ; A8: vmul.f32 60 ; A8: vmul.f32 61 ; A8: vmul.f32 85 ; A8: vmul.f32 86 ; A8: vmul.f32 92 ; A9: vmul.f32 97 ; HARD: vmul.f32 s0, s2, s3
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D | fmuls.ll | 26 ; VFP2: vmul.f32 s 29 ; NFP1: vmul.f32 d 31 ; NFP0: vmul.f32 s 34 ; CORTEXA8: vmul.f32 s 36 ; CORTEXA8U: vmul.f32 d 38 ; CORTEXA9: vmul.f32 s
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D | fp-fast.ll | 7 ; CHECK: vmul.f32 16 ; CHECK-NOT: vmul 18 ; CHECK-NOT: vmul 45 ; CHECK: vmul.f32 54 ; CHECK: vmul.f32
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D | saxpy10-a9.ll | 18 ; CHECK-NEXT: vmul 25 ; CHECK-NEXT: vmul 30 ; CHECK-NEXT: vmul 36 ; CHECK-NEXT: vmul 41 ; CHECK-NEXT: vmul 46 ; CHECK-NEXT: vmul 51 ; CHECK-NEXT: vmul 54 ; CHECK-NEXT: vmul
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | neon-spfp.ll | 47 ; CHECK-LINUXA5: vmul.f32 s{{[0-9]*}} 48 ; CHECK-LINUXA8: vmul.f32 s{{[0-9]*}} 49 ; CHECK-LINUXA9: vmul.f32 s{{[0-9]*}} 50 ; CHECK-LINUXA15: vmul.f32 s{{[0-9]*}} 52 ; CHECK-LINUXSWIFT: vmul.f32 d{{[0-9]*}} 54 ; CHECK-UNSAFEA5: vmul.f32 d{{[0-9]*}} 55 ; CHECK-UNSAFEA8: vmul.f32 d{{[0-9]*}} 57 ; CHECK-UNSAFEA9: vmul.f32 s{{[0-9]*}} 58 ; CHECK-UNSAFEA15: vmul.f32 s{{[0-9]*}} 59 ; CHECK-UNSAFESWIFT: vmul.f32 d{{[0-9]*}} [all …]
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D | fmacs.ll | 16 ; A8: vmul.f32 32 ; A8: vmul.f64 48 ; A8: vmul.f32 60 ; A8: vmul.f32 61 ; A8: vmul.f32 85 ; A8: vmul.f32 86 ; A8: vmul.f32 92 ; A9: vmul.f32 97 ; HARD: vmul.f32 s0, s2, s3
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D | fmuls.ll | 26 ; VFP2: vmul.f32 s 29 ; NFP1: vmul.f32 d 31 ; NFP0: vmul.f32 s 34 ; CORTEXA8: vmul.f32 s 36 ; CORTEXA8U: vmul.f32 d 38 ; CORTEXA9: vmul.f32 s
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D | fp-fast.ll | 7 ; CHECK: vmul.f32 16 ; CHECK-NOT: vmul 18 ; CHECK-NOT: vmul 45 ; CHECK: vmul.f32 54 ; CHECK: vmul.f32
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D | saxpy10-a9.ll | 18 ; CHECK-NEXT: vmul 25 ; CHECK-NEXT: vmul 30 ; CHECK-NEXT: vmul 36 ; CHECK-NEXT: vmul 41 ; CHECK-NEXT: vmul 46 ; CHECK-NEXT: vmul 51 ; CHECK-NEXT: vmul 54 ; CHECK-NEXT: vmul
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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
D | mul-vec.ll | 1 ; Show that we know how to translate vmul vector instructions. 35 ; ASM: vmul.f32 q10, q10, q11 37 ; IASM-NOT: vmul.f32 50 ; ASM: vmul.i32 q10, q10, q11 52 ; IASM-NOT: vmul.i32 65 ; ASM: vmul.i16 q10, q10, q11 67 ; IASM-NOT: vmul.i16 80 ; ASM: vmul.i8 q10, q10, q11 82 ; IASM-NOT: vmul.i8
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | fmacs.ll | 16 ; A8: vmul.f32 32 ; A8: vmul.f64 48 ; A8: vmul.f32 60 ; A8: vmul.f32 61 ; A8: vmul.f32 85 ; A8: vmul.f32 86 ; A8: vmul.f32 92 ; A9: vmul.f32 97 ; HARD: vmul.f32 s0, s2, s3
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D | fmuls.ll | 13 ; VFP2: vmul.f32 s0, s1, s0 16 ; NFP1: vmul.f32 d0, d1, d0 18 ; NFP0: vmul.f32 s0, s1, s0 21 ; CORTEXA8: vmul.f32 d0, d1, d0 23 ; CORTEXA9: vmul.f32 s{{.}}, s{{.}}, s{{.}}
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/external/libavc/common/arm/ |
D | ih264_intra_pred_chroma_a9q.s | 406 vmul.s16 q7, q5, q4 407 vmul.s16 q8, q6, q4 463 vmul.s16 q6, q2, q4 464 vmul.s16 q8, q2, q5 470 vmul.s16 q2, q3, q10 472 vmul.s16 q9, q3, q10 473 vmul.s16 q7, q3, q15 474 vmul.s16 q4, q3, q15 485 vmul.s16 q2, q3, q10 486 vmul.s16 q9, q3, q10 [all …]
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D | ih264_weighted_pred_a9q.s | 144 vmul.s16 q2, q2, d2[0] @weight mult. for rows 1,2 145 vmul.s16 q3, q3, d2[0] @weight mult. for rows 3,4 176 vmul.s16 q2, q2, d2[0] @weight mult. for row 1 178 vmul.s16 q3, q3, d2[0] @weight mult. for row 2 179 vmul.s16 q4, q4, d2[0] @weight mult. for row 3 180 vmul.s16 q5, q5, d2[0] @weight mult. for row 4 216 vmul.s16 q6, q6, d2[0] @weight mult. for row 1L 218 vmul.s16 q7, q7, d2[0] @weight mult. for row 1H 220 vmul.s16 q8, q8, d2[0] @weight mult. for row 2L 222 vmul.s16 q9, q9, d2[0] @weight mult. for row 2H [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
D | cortex-fp.ll | 11 ; CORTEXM4: vmul.f32 s 12 ; CORTEXM7: vmul.f32 s 13 ; CORTEXA8: vmul.f32 d 24 ; CORTEXM7: vmul.f64 d 25 ; CORTEXA8: vmul.f64 d
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/external/llvm/test/CodeGen/Thumb2/ |
D | cortex-fp.ll | 11 ; CORTEXM4: vmul.f32 s 12 ; CORTEXM7: vmul.f32 s 13 ; CORTEXA8: vmul.f32 d 24 ; CORTEXM7: vmul.f64 d 25 ; CORTEXA8: vmul.f64 d
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
D | cortex-fp.ll | 10 ; CORTEXM4: vmul.f32 s0, s1, s0 11 ; CORTEXA8: vmul.f32 d0, d1, d0 22 ; CORTEXA8: vmul.f64 d16, d17, d16
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