/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | neon-neg-encoding.s | 19 @ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xf3] 20 vqneg.s8 d16, d16 21 @ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xf3] 22 vqneg.s16 d16, d16 23 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xf3] 24 vqneg.s32 d16, d16 25 @ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xf3] 26 vqneg.s8 q8, q8 27 @ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xf3] 28 vqneg.s16 q8, q8 [all …]
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D | neont2-neg-encoding.s | 21 @ CHECK: vqneg.s8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x07] 22 vqneg.s8 d16, d16 23 @ CHECK: vqneg.s16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x07] 24 vqneg.s16 d16, d16 25 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xf8,0xff,0xa0,0x07] 26 vqneg.s32 d16, d16 27 @ CHECK: vqneg.s8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x07] 28 vqneg.s8 q8, q8 29 @ CHECK: vqneg.s16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x07] 30 vqneg.s16 q8, q8 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | neont2-neg-encoding.s | 21 @ CHECK: vqneg.s8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x07] 22 vqneg.s8 d16, d16 23 @ CHECK: vqneg.s16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x07] 24 vqneg.s16 d16, d16 25 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xf8,0xff,0xa0,0x07] 26 vqneg.s32 d16, d16 27 @ CHECK: vqneg.s8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x07] 28 vqneg.s8 q8, q8 29 @ CHECK: vqneg.s16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x07] 30 vqneg.s16 q8, q8 [all …]
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D | neon-neg-encoding.s | 19 @ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xf3] 20 vqneg.s8 d16, d16 21 @ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xf3] 22 vqneg.s16 d16, d16 23 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xf3] 24 vqneg.s32 d16, d16 25 @ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xf3] 26 vqneg.s8 q8, q8 27 @ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xf3] 28 vqneg.s16 q8, q8 [all …]
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/external/llvm/test/MC/ARM/ |
D | neont2-neg-encoding.s | 21 @ CHECK: vqneg.s8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x07] 22 vqneg.s8 d16, d16 23 @ CHECK: vqneg.s16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x07] 24 vqneg.s16 d16, d16 25 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xf8,0xff,0xa0,0x07] 26 vqneg.s32 d16, d16 27 @ CHECK: vqneg.s8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x07] 28 vqneg.s8 q8, q8 29 @ CHECK: vqneg.s16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x07] 30 vqneg.s16 q8, q8 [all …]
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D | neon-neg-encoding.s | 19 @ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xf3] 20 vqneg.s8 d16, d16 21 @ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xf3] 22 vqneg.s16 d16, d16 23 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xf3] 24 vqneg.s32 d16, d16 25 @ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xf3] 26 vqneg.s8 q8, q8 27 @ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xf3] 28 vqneg.s16 q8, q8 [all …]
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | vneg.ll | 69 ;CHECK: vqneg.s8 71 %tmp2 = call <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8> %tmp1) 77 ;CHECK: vqneg.s16 79 %tmp2 = call <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16> %tmp1) 85 ;CHECK: vqneg.s32 87 %tmp2 = call <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32> %tmp1) 93 ;CHECK: vqneg.s8 95 %tmp2 = call <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8> %tmp1) 101 ;CHECK: vqneg.s16 103 %tmp2 = call <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16> %tmp1) [all …]
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/external/llvm/test/CodeGen/ARM/ |
D | vneg.ll | 69 ;CHECK: vqneg.s8 71 %tmp2 = call <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8> %tmp1) 77 ;CHECK: vqneg.s16 79 %tmp2 = call <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16> %tmp1) 85 ;CHECK: vqneg.s32 87 %tmp2 = call <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32> %tmp1) 93 ;CHECK: vqneg.s8 95 %tmp2 = call <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8> %tmp1) 101 ;CHECK: vqneg.s16 103 %tmp2 = call <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16> %tmp1) [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | vneg.ll | 69 ;CHECK: vqneg.s8 71 %tmp2 = call <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8> %tmp1) 77 ;CHECK: vqneg.s16 79 %tmp2 = call <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16> %tmp1) 85 ;CHECK: vqneg.s32 87 %tmp2 = call <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32> %tmp1) 93 ;CHECK: vqneg.s8 95 %tmp2 = call <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8> %tmp1) 101 ;CHECK: vqneg.s16 103 %tmp2 = call <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16> %tmp1) [all …]
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/external/capstone/suite/MC/ARM/ |
D | neon-neg-encoding.s.cs | 10 0xa0,0x07,0xf0,0xf3 = vqneg.s8 d16, d16 11 0xa0,0x07,0xf4,0xf3 = vqneg.s16 d16, d16 12 0xa0,0x07,0xf8,0xf3 = vqneg.s32 d16, d16 13 0xe0,0x07,0xf0,0xf3 = vqneg.s8 q8, q8 14 0xe0,0x07,0xf4,0xf3 = vqneg.s16 q8, q8 15 0xe0,0x07,0xf8,0xf3 = vqneg.s32 q8, q8
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D | neont2-neg-encoding.s.cs | 10 0xf0,0xff,0xa0,0x07 = vqneg.s8 d16, d16 11 0xf4,0xff,0xa0,0x07 = vqneg.s16 d16, d16 12 0xf8,0xff,0xa0,0x07 = vqneg.s32 d16, d16 13 0xf0,0xff,0xe0,0x07 = vqneg.s8 q8, q8 14 0xf4,0xff,0xe0,0x07 = vqneg.s16 q8, q8 15 0xf8,0xff,0xe0,0x07 = vqneg.s32 q8, q8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-arith-saturating.ll | 108 %vqneg.i = tail call i32 @llvm.aarch64.neon.sqneg.i32(i32 %vecext) nounwind 109 ret i32 %vqneg.i 117 %vqneg.i = tail call i64 @llvm.aarch64.neon.sqneg.i64(i64 %vecext) nounwind 118 ret i64 %vqneg.i
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-arith-saturating.ll | 108 %vqneg.i = tail call i32 @llvm.aarch64.neon.sqneg.i32(i32 %vecext) nounwind 109 ret i32 %vqneg.i 117 %vqneg.i = tail call i64 @llvm.aarch64.neon.sqneg.i64(i64 %vecext) nounwind 118 ret i64 %vqneg.i
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/external/arm-neon-tests/ |
D | ref_vqneg.c | 26 #define INSN_NAME vqneg
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D | Makefile.gcc | 49 vcombine vmax vmin vneg vqneg vmlal vmlal_lane vmlsl \
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D | Makefile | 43 vcombine vmax vmin vneg vqneg vmlal vmlal_lane vmlsl \
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | neont2.txt | 725 # CHECK: vqneg.s8 d16, d16 727 # CHECK: vqneg.s16 d16, d16 729 # CHECK: vqneg.s32 d16, d16 731 # CHECK: vqneg.s8 q8, q8 733 # CHECK: vqneg.s16 q8, q8 735 # CHECK: vqneg.s32 q8, q8
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D | neon.txt | 831 # CHECK: vqneg.s8 d16, d16 833 # CHECK: vqneg.s16 d16, d16 835 # CHECK: vqneg.s32 d16, d16 837 # CHECK: vqneg.s8 q8, q8 839 # CHECK: vqneg.s16 q8, q8 841 # CHECK: vqneg.s32 q8, q8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | neont2.txt | 725 # CHECK: vqneg.s8 d16, d16 727 # CHECK: vqneg.s16 d16, d16 729 # CHECK: vqneg.s32 d16, d16 731 # CHECK: vqneg.s8 q8, q8 733 # CHECK: vqneg.s16 q8, q8 735 # CHECK: vqneg.s32 q8, q8
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D | neon.txt | 831 # CHECK: vqneg.s8 d16, d16 833 # CHECK: vqneg.s16 d16, d16 835 # CHECK: vqneg.s32 d16, d16 837 # CHECK: vqneg.s8 q8, q8 839 # CHECK: vqneg.s16 q8, q8 841 # CHECK: vqneg.s32 q8, q8
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/external/llvm/test/MC/Disassembler/ARM/ |
D | neont2.txt | 725 # CHECK: vqneg.s8 d16, d16 727 # CHECK: vqneg.s16 d16, d16 729 # CHECK: vqneg.s32 d16, d16 731 # CHECK: vqneg.s8 q8, q8 733 # CHECK: vqneg.s16 q8, q8 735 # CHECK: vqneg.s32 q8, q8
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D | neon.txt | 831 # CHECK: vqneg.s8 d16, d16 833 # CHECK: vqneg.s16 d16, d16 835 # CHECK: vqneg.s32 d16, d16 837 # CHECK: vqneg.s8 q8, q8 839 # CHECK: vqneg.s16 q8, q8 841 # CHECK: vqneg.s32 q8, q8
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/external/clang/include/clang/Basic/ |
D | arm_neon.td | 792 def VQNEG : SInst<"vqneg", "dd", "csiQcQsQi">; 942 def QNEG : SInst<"vqneg", "dd", "lQl">; 1565 def SCALAR_SQNEG : SInst<"vqneg", "ss", "ScSsSiSl">;
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 5331 void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm); 5332 void vqneg(DataType dt, DRegister rd, DRegister rm) { vqneg(al, dt, rd, rm); } in vqneg() function 5334 void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm); 5335 void vqneg(DataType dt, QRegister rd, QRegister rm) { vqneg(al, dt, rd, rm); } in vqneg() function
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D | disasm-aarch32.h | 2208 void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm); 2210 void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
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