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Searched refs:vqshlu (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dneont2-satshift-encoding.s53 @ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x06]
54 vqshlu.s8 d16, d16, #7
55 @ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x06]
56 vqshlu.s16 d16, d16, #15
57 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06]
58 vqshlu.s32 d16, d16, #31
59 @ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x06]
60 vqshlu.s64 d16, d16, #63
77 @ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x06]
78 vqshlu.s8 q8, q8, #7
[all …]
Dneon-satshift-encoding.s51 @ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xf3]
52 vqshlu.s8 d16, d16, #7
53 @ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xf3]
54 vqshlu.s16 d16, d16, #15
55 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3]
56 vqshlu.s32 d16, d16, #31
57 @ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xf3]
58 vqshlu.s64 d16, d16, #63
75 @ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xf3]
76 vqshlu.s8 q8, q8, #7
[all …]
/external/llvm/test/MC/ARM/
Dneont2-satshift-encoding.s53 @ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x06]
54 vqshlu.s8 d16, d16, #7
55 @ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x06]
56 vqshlu.s16 d16, d16, #15
57 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06]
58 vqshlu.s32 d16, d16, #31
59 @ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x06]
60 vqshlu.s64 d16, d16, #63
77 @ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x06]
78 vqshlu.s8 q8, q8, #7
[all …]
Dneon-satshift-encoding.s51 @ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xf3]
52 vqshlu.s8 d16, d16, #7
53 @ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xf3]
54 vqshlu.s16 d16, d16, #15
55 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3]
56 vqshlu.s32 d16, d16, #31
57 @ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xf3]
58 vqshlu.s64 d16, d16, #63
75 @ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xf3]
76 vqshlu.s8 q8, q8, #7
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-satshift-encoding.s51 @ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xf3]
52 vqshlu.s8 d16, d16, #7
53 @ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xf3]
54 vqshlu.s16 d16, d16, #15
55 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3]
56 vqshlu.s32 d16, d16, #31
57 @ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xf3]
58 vqshlu.s64 d16, d16, #63
75 @ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xf3]
76 vqshlu.s8 q8, q8, #7
[all …]
Dneont2-satshift-encoding.s53 @ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x06]
54 vqshlu.s8 d16, d16, #7
55 @ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x06]
56 vqshlu.s16 d16, d16, #15
57 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06]
58 vqshlu.s32 d16, d16, #31
59 @ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x06]
60 vqshlu.s64 d16, d16, #63
77 @ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x06]
78 vqshlu.s8 q8, q8, #7
[all …]
/external/capstone/suite/MC/ARM/
Dneont2-satshift-encoding.s.cs26 0xcf,0xff,0x30,0x06 = vqshlu.s8 d16, d16, #7
27 0xdf,0xff,0x30,0x06 = vqshlu.s16 d16, d16, #15
28 0xff,0xff,0x30,0x06 = vqshlu.s32 d16, d16, #31
29 0xff,0xff,0xb0,0x06 = vqshlu.s64 d16, d16, #63
38 0xcf,0xff,0x70,0x06 = vqshlu.s8 q8, q8, #7
39 0xdf,0xff,0x70,0x06 = vqshlu.s16 q8, q8, #15
40 0xff,0xff,0x70,0x06 = vqshlu.s32 q8, q8, #31
41 0xff,0xff,0xf0,0x06 = vqshlu.s64 q8, q8, #63
Dneon-satshift-encoding.s.cs26 0x30,0x06,0xcf,0xf3 = vqshlu.s8 d16, d16, #7
27 0x30,0x06,0xdf,0xf3 = vqshlu.s16 d16, d16, #15
28 0x30,0x06,0xff,0xf3 = vqshlu.s32 d16, d16, #31
29 0xb0,0x06,0xff,0xf3 = vqshlu.s64 d16, d16, #63
38 0x70,0x06,0xcf,0xf3 = vqshlu.s8 q8, q8, #7
39 0x70,0x06,0xdf,0xf3 = vqshlu.s16 q8, q8, #15
40 0x70,0x06,0xff,0xf3 = vqshlu.s32 q8, q8, #31
41 0xf0,0x06,0xff,0xf3 = vqshlu.s64 q8, q8, #63
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvqshl.ll213 ;CHECK: vqshlu.s8
221 ;CHECK: vqshlu.s16
229 ;CHECK: vqshlu.s32
237 ;CHECK: vqshlu.s64
309 ;CHECK: vqshlu.s8
317 ;CHECK: vqshlu.s16
325 ;CHECK: vqshlu.s32
333 ;CHECK: vqshlu.s64
/external/llvm/test/CodeGen/ARM/
Dvqshl.ll213 ;CHECK: vqshlu.s8
221 ;CHECK: vqshlu.s16
229 ;CHECK: vqshlu.s32
237 ;CHECK: vqshlu.s64
309 ;CHECK: vqshlu.s8
317 ;CHECK: vqshlu.s16
325 ;CHECK: vqshlu.s32
333 ;CHECK: vqshlu.s64
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvqshl.ll213 ;CHECK: vqshlu.s8
221 ;CHECK: vqshlu.s16
229 ;CHECK: vqshlu.s32
237 ;CHECK: vqshlu.s64
309 ;CHECK: vqshlu.s8
317 ;CHECK: vqshlu.s16
325 ;CHECK: vqshlu.s32
333 ;CHECK: vqshlu.s64
/external/arm-neon-tests/
Dref_vqshlu_n.c34 #define INSN vqshlu
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt920 # CHECK: vqshlu.s8 d16, d16, #7
922 # CHECK: vqshlu.s16 d16, d16, #15
924 # CHECK: vqshlu.s32 d16, d16, #31
926 # CHECK: vqshlu.s64 d16, d16, #63
944 # CHECK: vqshlu.s8 q8, q8, #7
946 # CHECK: vqshlu.s16 q8, q8, #15
948 # CHECK: vqshlu.s32 q8, q8, #31
950 # CHECK: vqshlu.s64 q8, q8, #63
Dneon.txt1031 # CHECK: vqshlu.s8 d16, d16, #7
1033 # CHECK: vqshlu.s16 d16, d16, #15
1035 # CHECK: vqshlu.s32 d16, d16, #31
1037 # CHECK: vqshlu.s64 d16, d16, #63
1055 # CHECK: vqshlu.s8 q8, q8, #7
1057 # CHECK: vqshlu.s16 q8, q8, #15
1059 # CHECK: vqshlu.s32 q8, q8, #31
1061 # CHECK: vqshlu.s64 q8, q8, #63
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dneont2.txt920 # CHECK: vqshlu.s8 d16, d16, #7
922 # CHECK: vqshlu.s16 d16, d16, #15
924 # CHECK: vqshlu.s32 d16, d16, #31
926 # CHECK: vqshlu.s64 d16, d16, #63
944 # CHECK: vqshlu.s8 q8, q8, #7
946 # CHECK: vqshlu.s16 q8, q8, #15
948 # CHECK: vqshlu.s32 q8, q8, #31
950 # CHECK: vqshlu.s64 q8, q8, #63
Dneon.txt1031 # CHECK: vqshlu.s8 d16, d16, #7
1033 # CHECK: vqshlu.s16 d16, d16, #15
1035 # CHECK: vqshlu.s32 d16, d16, #31
1037 # CHECK: vqshlu.s64 d16, d16, #63
1055 # CHECK: vqshlu.s8 q8, q8, #7
1057 # CHECK: vqshlu.s16 q8, q8, #15
1059 # CHECK: vqshlu.s32 q8, q8, #31
1061 # CHECK: vqshlu.s64 q8, q8, #63
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt920 # CHECK: vqshlu.s8 d16, d16, #7
922 # CHECK: vqshlu.s16 d16, d16, #15
924 # CHECK: vqshlu.s32 d16, d16, #31
926 # CHECK: vqshlu.s64 d16, d16, #63
944 # CHECK: vqshlu.s8 q8, q8, #7
946 # CHECK: vqshlu.s16 q8, q8, #15
948 # CHECK: vqshlu.s32 q8, q8, #31
950 # CHECK: vqshlu.s64 q8, q8, #63
Dneon.txt1031 # CHECK: vqshlu.s8 d16, d16, #7
1033 # CHECK: vqshlu.s16 d16, d16, #15
1035 # CHECK: vqshlu.s32 d16, d16, #31
1037 # CHECK: vqshlu.s64 d16, d16, #63
1055 # CHECK: vqshlu.s8 q8, q8, #7
1057 # CHECK: vqshlu.s16 q8, q8, #15
1059 # CHECK: vqshlu.s32 q8, q8, #31
1061 # CHECK: vqshlu.s64 q8, q8, #63
/external/libjpeg-turbo/simd/arm/
Djsimd_neon.S1406 vqshlu.s16 q13, q11, #8
1407 vqshlu.s16 q15, q12, #8
1408 vqshlu.s16 q14, q14, #8
1448 vqshlu.s16 q13, q11, #8
1450 vqshlu.s16 q15, q12, #8
1451 vqshlu.s16 q14, q14, #8
/external/vixl/src/aarch32/
Dassembler-aarch32.h5421 void vqshlu(Condition cond,
5426 void vqshlu(DataType dt, in vqshlu() function
5430 vqshlu(al, dt, rd, rm, operand); in vqshlu()
5433 void vqshlu(Condition cond,
5438 void vqshlu(DataType dt, in vqshlu() function
5442 vqshlu(al, dt, rd, rm, operand); in vqshlu()
Ddisasm-aarch32.h2260 void vqshlu(Condition cond,
2266 void vqshlu(Condition cond,
Ddisasm-aarch32.cc5974 void Disassembler::vqshlu(Condition cond, in vqshlu() function in vixl::aarch32::Disassembler
5988 void Disassembler::vqshlu(Condition cond, in vqshlu() function in vixl::aarch32::Disassembler
31565 vqshlu(CurrentCond(), in DecodeT32()
36771 vqshlu(CurrentCond(), in DecodeT32()
44132 vqshlu(al, dt, DRegister(rd), DRegister(rm), imm); in DecodeA32()
48318 vqshlu(al, dt, QRegister(rd), QRegister(rm), imm); in DecodeA32()
Dassembler-aarch32.cc23538 void Assembler::vqshlu(Condition cond, in vqshlu() function in vixl::aarch32::Assembler
23577 Delegate(kVqshlu, &Assembler::vqshlu, cond, dt, rd, rm, operand); in vqshlu()
23580 void Assembler::vqshlu(Condition cond, in vqshlu() function in vixl::aarch32::Assembler
23619 Delegate(kVqshlu, &Assembler::vqshlu, cond, dt, rd, rm, operand); in vqshlu()
Dmacro-assembler-aarch32.h8909 vqshlu(cond, dt, rd, rm, operand); in Vqshlu()
8930 vqshlu(cond, dt, rd, rm, operand); in Vqshlu()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc7783 "shl\006vqshlu\006vqshrn\007vqshrun\005vqsub\007vraddhn\006vrecpe\006vre"
10840 …{ 2368 /* vqshlu */, ARM::VQSHLsuv8i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10841 …{ 2368 /* vqshlu */, ARM::VQSHLsuv4i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10842 …{ 2368 /* vqshlu */, ARM::VQSHLsuv4i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10843 …{ 2368 /* vqshlu */, ARM::VQSHLsuv2i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10844 …{ 2368 /* vqshlu */, ARM::VQSHLsuv2i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10845 …{ 2368 /* vqshlu */, ARM::VQSHLsuv1i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10846 …{ 2368 /* vqshlu */, ARM::VQSHLsuv16i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasN…
10847 …{ 2368 /* vqshlu */, ARM::VQSHLsuv8i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNE…
10848 …{ 2368 /* vqshlu */, ARM::VQSHLsuv8i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasN…
[all …]

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