Home
last modified time | relevance | path

Searched refs:vqshrun (Results 1 – 25 of 30) sorted by relevance

12

/external/libhevc/common/arm/
Dihevc_weighted_pred_bi_default.s199 vqshrun.s16 d20,q9,#7
210 vqshrun.s16 d30,q15,#7
249 vqshrun.s16 d20,q9,#7
291 vqshrun.s16 d20,q12,#7
294 vqshrun.s16 d21,q11,#7
301 vqshrun.s16 d30,q15,#7
302 vqshrun.s16 d31,q4,#7
347 vqshrun.s16 d20,q12,#7
348 vqshrun.s16 d21,q11,#7
425 vqshrun.s16 d20,q11,#7
[all …]
Dihevc_intra_pred_luma_dc.s471 vqshrun.s16 d2, q10, #2 @columns shr2 movn (prol)
474 vqshrun.s16 d3, q11, #2 @rows shr2 movn (prol)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dneont2-satshift-encoding.s129 @ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x08]
130 vqshrun.s16 d16, q8, #8
131 @ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x08]
132 vqshrun.s32 d16, q8, #16
133 @ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x08]
134 vqshrun.s64 d16, q8, #32
Dneon-satshift-encoding.s127 @ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf3]
128 vqshrun.s16 d16, q8, #8
129 @ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf3]
130 vqshrun.s32 d16, q8, #16
131 @ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf3]
132 vqshrun.s64 d16, q8, #32
/external/llvm/test/MC/ARM/
Dneont2-satshift-encoding.s129 @ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x08]
130 vqshrun.s16 d16, q8, #8
131 @ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x08]
132 vqshrun.s32 d16, q8, #16
133 @ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x08]
134 vqshrun.s64 d16, q8, #32
Dneon-satshift-encoding.s127 @ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf3]
128 vqshrun.s16 d16, q8, #8
129 @ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf3]
130 vqshrun.s32 d16, q8, #16
131 @ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf3]
132 vqshrun.s64 d16, q8, #32
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-satshift-encoding.s127 @ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf3]
128 vqshrun.s16 d16, q8, #8
129 @ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf3]
130 vqshrun.s32 d16, q8, #16
131 @ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf3]
132 vqshrun.s64 d16, q8, #32
Dneont2-satshift-encoding.s129 @ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x08]
130 vqshrun.s16 d16, q8, #8
131 @ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x08]
132 vqshrun.s32 d16, q8, #16
133 @ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x08]
134 vqshrun.s64 d16, q8, #32
/external/capstone/suite/MC/ARM/
Dneont2-satshift-encoding.s.cs64 0xc8,0xff,0x30,0x08 = vqshrun.s16 d16, q8, #8
65 0xd0,0xff,0x30,0x08 = vqshrun.s32 d16, q8, #16
66 0xe0,0xff,0x30,0x08 = vqshrun.s64 d16, q8, #32
Dneon-satshift-encoding.s.cs64 0x30,0x08,0xc8,0xf3 = vqshrun.s16 d16, q8, #8
65 0x30,0x08,0xd0,0xf3 = vqshrun.s32 d16, q8, #16
66 0x30,0x08,0xe0,0xf3 = vqshrun.s64 d16, q8, #32
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvqshrn.ll53 ;CHECK: vqshrun.s16
61 ;CHECK: vqshrun.s32
69 ;CHECK: vqshrun.s64
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvqshrn.ll53 ;CHECK: vqshrun.s16
61 ;CHECK: vqshrun.s32
69 ;CHECK: vqshrun.s64
/external/llvm/test/CodeGen/ARM/
Dvqshrn.ll53 ;CHECK: vqshrun.s16
61 ;CHECK: vqshrun.s32
69 ;CHECK: vqshrun.s64
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-simd-shift.ll336 %vqshrun = tail call <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16> %b, i32 3)
338 %2 = bitcast <8 x i8> %vqshrun to <1 x i64>
347 %vqshrun = tail call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> %b, i32 9)
349 %2 = bitcast <4 x i16> %vqshrun to <1 x i64>
359 %vqshrun = tail call <2 x i32> @llvm.aarch64.neon.sqshrun.v2i32(<2 x i64> %b, i32 19)
360 %2 = bitcast <2 x i32> %vqshrun to <1 x i64>
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-simd-shift.ll336 %vqshrun = tail call <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16> %b, i32 3)
338 %2 = bitcast <8 x i8> %vqshrun to <1 x i64>
347 %vqshrun = tail call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> %b, i32 9)
349 %2 = bitcast <4 x i16> %vqshrun to <1 x i64>
359 %vqshrun = tail call <2 x i32> @llvm.aarch64.neon.sqshrun.v2i32(<2 x i64> %b, i32 19)
360 %2 = bitcast <2 x i32> %vqshrun to <1 x i64>
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt996 # CHECK: vqshrun.s16 d16, q8, #8
998 # CHECK: vqshrun.s32 d16, q8, #16
1000 # CHECK: vqshrun.s64 d16, q8, #32
Dneon.txt1107 # CHECK: vqshrun.s16 d16, q8, #8
1109 # CHECK: vqshrun.s32 d16, q8, #16
1111 # CHECK: vqshrun.s64 d16, q8, #32
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dneont2.txt996 # CHECK: vqshrun.s16 d16, q8, #8
998 # CHECK: vqshrun.s32 d16, q8, #16
1000 # CHECK: vqshrun.s64 d16, q8, #32
Dneon.txt1107 # CHECK: vqshrun.s16 d16, q8, #8
1109 # CHECK: vqshrun.s32 d16, q8, #16
1111 # CHECK: vqshrun.s64 d16, q8, #32
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt996 # CHECK: vqshrun.s16 d16, q8, #8
998 # CHECK: vqshrun.s32 d16, q8, #16
1000 # CHECK: vqshrun.s64 d16, q8, #32
Dneon.txt1107 # CHECK: vqshrun.s16 d16, q8, #8
1109 # CHECK: vqshrun.s32 d16, q8, #16
1111 # CHECK: vqshrun.s64 d16, q8, #32
/external/vixl/src/aarch32/
Dassembler-aarch32.h5457 void vqshrun(Condition cond,
5462 void vqshrun(DataType dt, in vqshrun() function
5466 vqshrun(al, dt, rd, rm, operand); in vqshrun()
Ddisasm-aarch32.h2278 void vqshrun(Condition cond,
Ddisasm-aarch32.cc6012 void Disassembler::vqshrun(Condition cond, in vqshrun() function in vixl::aarch32::Disassembler
31839 vqshrun(CurrentCond(), in DecodeT32()
31982 vqshrun(CurrentCond(), in DecodeT32()
32125 vqshrun(CurrentCond(), in DecodeT32()
32268 vqshrun(CurrentCond(), in DecodeT32()
32410 vqshrun(CurrentCond(), in DecodeT32()
44369 vqshrun(al, in DecodeA32()
44504 vqshrun(al, in DecodeA32()
44639 vqshrun(al, in DecodeA32()
44774 vqshrun(al, in DecodeA32()
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc7783 "shl\006vqshlu\006vqshrn\007vqshrun\005vqsub\007vraddhn\006vrecpe\006vre"
10862 …{ 2382 /* vqshrun */, ARM::VQSHRUNv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_…
10863 …{ 2382 /* vqshrun */, ARM::VQSHRUNv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Featur…
10864 …{ 2382 /* vqshrun */, ARM::VQSHRUNv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Featur…

12