| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | post-ra-machine-sink.mir | 7 # CHECK-NOT: $w19 = COPY killed $w0
9 # CHECK: liveins: $w1, $w0
10 # CHECK: renamable $w19 = COPY killed $w0
16 liveins: $w0, $w1
18 renamable $w19 = COPY killed $w0
24 $w0 = ADDWrr $w1, $w19
28 $w0 = COPY $wzr
36 # CHECK-NOT: renamable $w19 = COPY killed $w0
38 # CHECK: liveins: $w1, $w0
39 # CHECK: renamable $w19 = COPY killed $w0
[all …]
|
| D | mul_pow2.ll | 10 ; CHECK: lsl w0, w0, #1
18 ; CHECK: add w0, w0, w0, lsl #1
26 ; CHECK: lsl w0, w0, #2
34 ; CHECK: add w0, w0, w0, lsl #2
43 ; CHECK: add {{w[0-9]+}}, w0, w0, lsl #1
44 ; CHECK: lsl w0, {{w[0-9]+}}, #1
63 ; CHECK: umull x0, w0, {{w[0-9]+}}
72 ; CHECK: smull x0, w0, {{w[0-9]+}}
81 ; CHECK: madd w0, w0, {{w[0-9]+}}, w1
90 ; CHECK: msub w0, w0, {{w[0-9]+}}, w1
[all …]
|
| D | falkor-hwpf-fix.mir | 13 liveins: $w0, $x1
18 $w0 = SUBWri $w0, 1, 0
19 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv
34 liveins: $w0, $x1, $q2
39 $w0 = SUBWri $w0, 1, 0
40 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv
55 liveins: $w0, $x1, $q2
58 $w0 = LDRWui $x1, 0
60 $w0 = SUBWri $w0, 1, 0
61 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv
[all …]
|
| D | machine-zero-copy-remove.mir | 4 # CHECK: ANDSWri $w0, 1, implicit-def $nzcv
11 liveins: $w0, $x1, $x2
13 $w0 = ANDSWri $w0, 1, implicit-def $nzcv
14 STRWui killed $w0, killed $x1, 0
21 $w0 = COPY $wzr
22 STRWui killed $w0, killed $x2, 0
52 # CHECK: ADDSWri $w0, 1, 0, implicit-def $nzcv
59 liveins: $w0, $x1, $x2
61 $w0 = ADDSWri $w0, 1, 0, implicit-def $nzcv
62 STRWui killed $w0, killed $x1, 0
[all …]
|
| D | arm64-fast-isel-icmp.ll | 6 ; CHECK: cmp w0, #31
7 ; CHECK-NEXT: cset w0, eq
16 ; CHECK: cmn w0, #7
17 ; CHECK-NEXT: cset w0, eq
26 ; CHECK: cmp w0, w1
27 ; CHECK-NEXT: cset w0, eq
36 ; CHECK: cmp w0, w1
37 ; CHECK-NEXT: cset w0, ne
66 ; CHECK: cmp w0, w1
67 ; CHECK-NEXT: cset w0, hi
[all …]
|
| D | signed-truncation-check.ll | 24 ; CHECK-NEXT: sxtb w8, w0
26 ; CHECK-NEXT: cmp w8, w0, uxth
27 ; CHECK-NEXT: cset w0, eq
38 ; CHECK-NEXT: sxth w8, w0
39 ; CHECK-NEXT: cmp w8, w0
40 ; CHECK-NEXT: cset w0, eq
51 ; CHECK-NEXT: sxtb w8, w0
52 ; CHECK-NEXT: cmp w8, w0
53 ; CHECK-NEXT: cset w0, eq
64 ; CHECK-NEXT: sxtw x8, w0
[all …]
|
| D | lack-of-signed-truncation-check.ll | 24 ; CHECK-NEXT: sxtb w8, w0
26 ; CHECK-NEXT: cmp w8, w0, uxth
27 ; CHECK-NEXT: cset w0, ne
38 ; CHECK-NEXT: sxth w8, w0
39 ; CHECK-NEXT: cmp w8, w0
40 ; CHECK-NEXT: cset w0, ne
51 ; CHECK-NEXT: sxtb w8, w0
52 ; CHECK-NEXT: cmp w8, w0
53 ; CHECK-NEXT: cset w0, ne
64 ; CHECK-NEXT: sxtw x8, w0
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | armv8.1a-atomic.s | 6 casb w0, w1, [x2]
7 casab w0, w1, [x2]
8 caslb w0, w1, [x2]
9 casalb w0, w1, [x2]
16 casb w0, w1, [w2]
26 cash w0, w1, [x2]
27 casah w0, w1, [x2]
28 caslh w0, w1, [x2]
29 casalh w0, w1, [x2]
37 cas w0, w1, [x2]
[all …]
|
| D | label-arithmetic-elf.s | 8 adds w0, w1, #(end - start)
10 add w0, w1, #(end - start)
12 cmp w0, #(end - start)
14 sub w0, w1, #(end - start)
25 add w0, w1, #(end - start), lsl #12
26 cmp w0, #(end - start), lsl #12
30 add w0, w1, #((end - start) >> 2)
31 cmp w0, #((end - start) >> 2)
35 add w0, w1, #(end - start + 12)
36 cmp w0, #(end - start + 12)
[all …]
|
| D | ldr-pseudo.s | 26 ldr w0, =0x10001
33 ldr w0, =0x10002
39 ldr w0, =0x10003
48 ldr w0, =0x10004
57 ldr w0, =0x10004
70 ldr w0, =0x10006
87 ldr w0, =0x10007
100 ldr w0, =foo
107 ldr w0, =f5
114 ldr w0, =f12
[all …]
|
| D | label-arithmetic-darwin.s | 9 adds w0, w1, #(Lend - Lstart)
11 add w0, w1, #(Lend - Lstart)
13 cmp w0, #(Lend - Lstart)
15 sub w0, w1, #(Lend - Lstart)
26 add w0, w1, #(Lend - Lstart), lsl #12
27 cmp w0, #(Lend - Lstart), lsl #12
31 add w0, w1, #((Lend - Lstart) >> 2)
32 cmp w0, #((Lend - Lstart) >> 2)
36 add w0, w1, #(Lend - Lstart + 12)
37 cmp w0, #(Lend - Lstart + 12)
[all …]
|
| D | label-arithmetic-diags-elf.s | 16 add w0, w1, #(end - start)
21 cmp w0, #(end - start)
27 add w0, w1, #(end - negative)
32 cmp w0, #(end - negative)
37 add w0, w1, #(end - external)
42 cmp w0, #(end - external)
47 add w0, w1, #:lo12:external - end
52 cmp w0, #:lo12:external - end
57 add w0, w1, #:got_lo12:external - end
62 cmp w0, #:got_lo12:external - end
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | armv8.1a-atomic.s | 6 casb w0, w1, [x2]
7 casab w0, w1, [x2]
8 caslb w0, w1, [x2]
9 casalb w0, w1, [x2]
16 casb w0, w1, [w2]
26 cash w0, w1, [x2]
27 casah w0, w1, [x2]
28 caslh w0, w1, [x2]
29 casalh w0, w1, [x2]
37 cas w0, w1, [x2]
[all …]
|
| D | ldr-pseudo.s | 26 ldr w0, =0x10001
33 ldr w0, =0x10002
39 ldr w0, =0x10003
48 ldr w0, =0x10004
57 ldr w0, =0x10004
70 ldr w0, =0x10006
87 ldr w0, =0x10007
100 ldr w0, =foo
107 ldr w0, =f5
114 ldr w0, =f12
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | mul_pow2.ll | 8 ; CHECK: lsl w0, w0, #1
16 ; CHECK: add w0, w0, w0, lsl #1
24 ; CHECK: lsl w0, w0, #2
32 ; CHECK: add w0, w0, w0, lsl #2
41 ; CHECK: lsl {{w[0-9]+}}, w0, #3
42 ; CHECK: sub w0, {{w[0-9]+}}, w0
50 ; CHECK: lsl w0, w0, #3
58 ; CHECK: add w0, w0, w0, lsl #3
69 ; CHECK: neg w0, w0, lsl #1
77 ; CHECK: sub w0, w0, w0, lsl #2
[all …]
|
| D | arm64-fast-isel-icmp.ll | 6 ; CHECK: cmp w0, #31
7 ; CHECK-NEXT: cset w0, eq
16 ; CHECK: cmn w0, #7
17 ; CHECK-NEXT: cset w0, eq
26 ; CHECK: cmp w0, w1
27 ; CHECK-NEXT: cset w0, eq
36 ; CHECK: cmp w0, w1
37 ; CHECK-NEXT: cset w0, ne
66 ; CHECK: cmp w0, w1
67 ; CHECK-NEXT: cset w0, hi
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | select-int-ext.mir | 32 liveins: $w0
35 ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY $w0
38 %0(s32) = COPY $w0
54 liveins: $w0
57 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
59 ; CHECK: $w0 = COPY [[COPY2]]
60 %2:gpr(s32) = COPY $w0
63 $w0 = COPY %1(s32)
77 liveins: $w0
80 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
[all …]
|
| D | legalize-itofp.mir | 32 liveins: $w0
34 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
36 %0:_(s32) = COPY $w0
38 $w0 = COPY %1
45 liveins: $w0
47 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
49 %0:_(s32) = COPY $w0
51 $w0 = COPY %1
64 $w0 = COPY %1
77 $w0 = COPY %1
[all …]
|
| D | legalize-fptoi.mir | 32 liveins: $w0
36 ; CHECK: $w0 = COPY [[FPTOSI]](s32)
39 $w0 = COPY %1
46 liveins: $w0
50 ; CHECK: $w0 = COPY [[FPTOUI]](s32)
53 $w0 = COPY %1
64 ; CHECK: $w0 = COPY [[FPTOSI]](s32)
67 $w0 = COPY %1
78 ; CHECK: $w0 = COPY [[FPTOUI]](s32)
81 $w0 = COPY %1
[all …]
|
| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_bc_decoder.cpp | 54 CF_WORD0_EGCM w0(dw0); in decode_cf() local
55 bc.addr = w0.get_ADDR(); in decode_cf()
56 bc.jumptable_sel = w0.get_JUMPTABLE_SEL(); in decode_cf()
83 CF_WORD0_R6R7 w0(dw0); in decode_cf() local
84 bc.addr = w0.get_ADDR(); in decode_cf()
116 CF_ALU_WORD0_ALL w0(dw0); in decode_cf_alu() local
118 bc.kc[0].bank = w0.get_KCACHE_BANK0(); in decode_cf_alu()
119 bc.kc[1].bank = w0.get_KCACHE_BANK1(); in decode_cf_alu()
120 bc.kc[0].mode = w0.get_KCACHE_MODE0(); in decode_cf_alu()
122 bc.addr = w0.get_ADDR(); in decode_cf_alu()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/ |
| D | branch-limits-msa.mir | 260 ; MSA: renamable $w0 = LDI_B 0
261 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
262 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
263 ; MSA: renamable $w0 = SHF_B killed renamable $w0, 27
264 ; MSA: renamable $w0 = SHF_W killed renamable $w0, 177
265 ; MSA: BNZ_B $w0, %bb.2, implicit-def $at {
285 ; PIC: renamable $w0 = LDI_B 0
286 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
287 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
288 ; PIC: renamable $w0 = SHF_B killed renamable $w0, 27
[all …]
|
| /external/tcpdump/ |
| D | print-tipc.c | 66 uint32_t w0; member
70 #define TIPC_VER(w0) (((w0) >> 29) & 0x07) argument
71 #define TIPC_USER(w0) (((w0) >> 25) & 0x0F) argument
72 #define TIPC_HSIZE(w0) (((w0) >> 21) & 0x0F) argument
73 #define TIPC_MSIZE(w0) (((w0) >> 0) & 0xFFFF) argument
110 uint32_t w0; member
124 uint32_t w0; member
146 uint32_t w0; member
161 uint32_t w0, w1, w2; in print_payload() local
176 w0 = EXTRACT_32BITS(&ap->w0); in print_payload()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-atomic.txt | 11 # CHECK: casb w0, w1, [x2]
12 # CHECK: casab w0, w1, [x2]
13 # CHECK: caslb w0, w1, [x2]
14 # CHECK: casalb w0, w1, [x2]
15 # CHECK: cash w0, w1, [x2]
16 # CHECK: casah w0, w1, [x2]
17 # CHECK: caslh w0, w1, [x2]
18 # CHECK: casalh w0, w1, [x2]
28 # CHECK: cas w0, w1, [x2]
29 # CHECK: casa w0, w1, [x2]
[all …]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-atomic.txt | 11 # CHECK: casb w0, w1, [x2]
12 # CHECK: casab w0, w1, [x2]
13 # CHECK: caslb w0, w1, [x2]
14 # CHECK: casalb w0, w1, [x2]
15 # CHECK: cash w0, w1, [x2]
16 # CHECK: casah w0, w1, [x2]
17 # CHECK: caslh w0, w1, [x2]
18 # CHECK: casalh w0, w1, [x2]
28 # CHECK: cas w0, w1, [x2]
29 # CHECK: casa w0, w1, [x2]
[all …]
|
| /external/llvm/test/CodeGen/MIR/AArch64/ |
| D | machine-dead-copy.mir | 20 liveins: %w0, %w1
22 BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0
23 RET_ReallyLR implicit %w0
35 liveins: %w0, %w1
37 BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0
38 %w0 = COPY %w20
39 RET_ReallyLR implicit %w0
50 liveins: %w0, %w1
52 BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0
53 %w20 = COPY %w0
[all …]
|