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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dmad24-get-global-id.ll3 ; If the workgroup id range is restricted, we should be able to use
6 declare i32 @llvm.amdgcn.workgroup.id.x() #0
18 %workgroup.size.xy = load i32, i32 addrspace(4)* %gep, align 4, !invariant.load !0
19 %workgroup.size.x = and i32 %workgroup.size.xy, 65535
22 %workgroup.id.x = call i32 @llvm.amdgcn.workgroup.id.x(), !range !2
24 %mul = mul i32 %workgroup.id.x, %workgroup.size.x
Dannotate-kernel-features-hsa.ll3 declare i32 @llvm.amdgcn.workgroup.id.x() #0
4 declare i32 @llvm.amdgcn.workgroup.id.y() #0
5 declare i32 @llvm.amdgcn.workgroup.id.z() #0
17 %val = call i32 @llvm.amdgcn.workgroup.id.x()
24 %val = call i32 @llvm.amdgcn.workgroup.id.y()
31 %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
33 %val1 = call i32 @llvm.amdgcn.workgroup.id.y()
40 %val0 = call i32 @llvm.amdgcn.workgroup.id.x()
41 %val1 = call i32 @llvm.amdgcn.workgroup.id.y()
49 %val = call i32 @llvm.amdgcn.workgroup.id.z()
[all …]
Dcallee-special-input-sgprs.ll111 %val = call i32 @llvm.amdgcn.workgroup.id.x()
125 %val = call i32 @llvm.amdgcn.workgroup.id.x()
134 %val = call i32 @llvm.amdgcn.workgroup.id.y()
143 %val = call i32 @llvm.amdgcn.workgroup.id.z()
152 %val0 = call i32 @llvm.amdgcn.workgroup.id.x()
153 %val1 = call i32 @llvm.amdgcn.workgroup.id.y()
164 %val0 = call i32 @llvm.amdgcn.workgroup.id.x()
165 %val1 = call i32 @llvm.amdgcn.workgroup.id.y()
166 %val2 = call i32 @llvm.amdgcn.workgroup.id.z()
177 %val0 = call i32 @llvm.amdgcn.workgroup.id.x()
[all …]
Dfence-barrier.ll7 declare i32 @llvm.amdgcn.workgroup.id.x()
32 fence syncscope("workgroup") release
34 fence syncscope("workgroup") acquire
39 %12 = call i32 @llvm.amdgcn.workgroup.id.x()
73 %9 = call i32 @llvm.amdgcn.workgroup.id.x()
91 %25 = call i32 @llvm.amdgcn.workgroup.id.x()
110 %44 = call i32 @llvm.amdgcn.workgroup.id.x()
125 fence syncscope("workgroup") release
127 fence syncscope("workgroup") acquire
152 %6 = call i32 @llvm.amdgcn.workgroup.id.x()
[all …]
Dattr-amdgpu-num-sgpr.ll40 ; workgroup ids: 3
74 ; %x.0 = call i32 @llvm.amdgcn.workgroup.id.x()
75 ; %x.1 = call i32 @llvm.amdgcn.workgroup.id.y()
76 ; %x.2 = call i32 @llvm.amdgcn.workgroup.id.z()
116 ; %x.0 = call i32 @llvm.amdgcn.workgroup.id.x()
118 ; %x.1 = call i32 @llvm.amdgcn.workgroup.id.y()
120 ; %x.2 = call i32 @llvm.amdgcn.workgroup.id.z()
134 declare i32 @llvm.amdgcn.workgroup.id.x() #1
135 declare i32 @llvm.amdgcn.workgroup.id.y() #1
136 declare i32 @llvm.amdgcn.workgroup.id.z() #1
Dsyncscopes.ll5 … 0, 0, implicit $exec, implicit $flat_scr :: (volatile store syncscope("workgroup") seq_cst 4 into…
10 i32 %workgroup,
16 store atomic i32 %workgroup, i32* %workgroup_out syncscope("workgroup") seq_cst, align 4
Dllvm.amdgcn.workgroup.id.ll8 declare i32 @llvm.amdgcn.workgroup.id.x() #0
9 declare i32 @llvm.amdgcn.workgroup.id.y() #0
10 declare i32 @llvm.amdgcn.workgroup.id.z() #0
38 %id = call i32 @llvm.amdgcn.workgroup.id.x()
65 %id = call i32 @llvm.amdgcn.workgroup.id.y()
100 %id = call i32 @llvm.amdgcn.workgroup.id.z()
Dannotate-kernel-features-hsa-call.ll3 declare i32 @llvm.amdgcn.workgroup.id.x() #0
4 declare i32 @llvm.amdgcn.workgroup.id.y() #0
5 declare i32 @llvm.amdgcn.workgroup.id.z() #0
40 %val = call i32 @llvm.amdgcn.workgroup.id.x()
47 %val = call i32 @llvm.amdgcn.workgroup.id.y()
54 %val = call i32 @llvm.amdgcn.workgroup.id.z()
82 %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
83 %val1 = call i32 @llvm.amdgcn.workgroup.id.z()
Dreqd-work-group-size.ll92 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
113 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.y()
134 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.z()
149 ; CHECK: %group.id = tail call i32 @llvm.amdgcn.workgroup.id.y()
159 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.y()
172 ; CHECK: %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
183 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
196 ; CHECK: %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
209 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
234 %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
[all …]
Dmemory-legalizer-atomic-fence.ll154 fence syncscope("workgroup") acquire
165 fence syncscope("workgroup") release
176 fence syncscope("workgroup") acq_rel
187 fence syncscope("workgroup") seq_cst
Dmemory-legalizer-atomic-rmw.ll192 %val = atomicrmw volatile xchg i32* %out, i32 %in syncscope("workgroup") monotonic
204 %val = atomicrmw volatile xchg i32* %out, i32 %in syncscope("workgroup") acquire
216 %val = atomicrmw volatile xchg i32* %out, i32 %in syncscope("workgroup") release
228 %val = atomicrmw volatile xchg i32* %out, i32 %in syncscope("workgroup") acq_rel
240 %val = atomicrmw volatile xchg i32* %out, i32 %in syncscope("workgroup") seq_cst
Dmemory-legalizer-atomic-cmpxchg.ll403 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") monotonic monotonic
416 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") acquire monotonic
429 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") release monotonic
442 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") acq_rel monotonic
455 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") seq_cst monotonic
468 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") acquire acquire
481 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") release acquire
494 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") acq_rel acquire
507 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") seq_cst acquire
520 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("workgroup") seq_cst seq_cst
Dllvm.amdgcn.update.dpp.ll31 fence syncscope("workgroup") release
33 fence syncscope("workgroup") acquire
Dshift-and-i128-ubfe.ll15 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
60 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
119 declare i32 @llvm.amdgcn.workgroup.id.x() #0
Dshift-and-i64-ubfe.ll13 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
47 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
63 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
113 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
129 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
145 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
164 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()
395 declare i32 @llvm.amdgcn.workgroup.id.x() #0
/external/llvm/test/CodeGen/AMDGPU/
Dmad24-get-global-id.ll3 ; If the workgroup id range is restricted, we should be able to use
6 declare i32 @llvm.amdgcn.workgroup.id.x() #0
18 %workgroup.size.xy = load i32, i32 addrspace(2)* %gep, align 4, !invariant.load !0
19 %workgroup.size.x = and i32 %workgroup.size.xy, 65535
22 %workgroup.id.x = call i32 @llvm.amdgcn.workgroup.id.x(), !range !2
24 %mul = mul i32 %workgroup.id.x, %workgroup.size.x
Dannotate-kernel-features-hsa.ll3 declare i32 @llvm.amdgcn.workgroup.id.x() #0
4 declare i32 @llvm.amdgcn.workgroup.id.y() #0
5 declare i32 @llvm.amdgcn.workgroup.id.z() #0
16 %val = call i32 @llvm.amdgcn.workgroup.id.x()
23 %val = call i32 @llvm.amdgcn.workgroup.id.y()
30 %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
32 %val1 = call i32 @llvm.amdgcn.workgroup.id.y()
39 %val0 = call i32 @llvm.amdgcn.workgroup.id.x()
40 %val1 = call i32 @llvm.amdgcn.workgroup.id.y()
48 %val = call i32 @llvm.amdgcn.workgroup.id.z()
[all …]
Damdgcn.work-item-intrinsics.ll19 ; The workgroup.id values are stored in sgprs offset by the number of user
33 %0 = call i32 @llvm.amdgcn.workgroup.id.x() #0
45 %0 = call i32 @llvm.amdgcn.workgroup.id.y() #0
61 %0 = call i32 @llvm.amdgcn.workgroup.id.z() #0
106 declare i32 @llvm.amdgcn.workgroup.id.x() #0
107 declare i32 @llvm.amdgcn.workgroup.id.y() #0
108 declare i32 @llvm.amdgcn.workgroup.id.z() #0
Dllvm.amdgcn.workgroup.id.ll6 declare i32 @llvm.amdgcn.workgroup.id.x() #0
7 declare i32 @llvm.amdgcn.workgroup.id.y() #0
8 declare i32 @llvm.amdgcn.workgroup.id.z() #0
37 %id = call i32 @llvm.amdgcn.workgroup.id.x()
65 %id = call i32 @llvm.amdgcn.workgroup.id.y()
101 %id = call i32 @llvm.amdgcn.workgroup.id.z()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/MIR/AMDGPU/
Dsyncscopes.mir9 …define void @syncscopes(i32 %agent, i32 addrspace(4)* %agent_out, i32 %workgroup, i32 addrspace(4)…
12 …store atomic i32 %workgroup, i32 addrspace(4)* %workgroup_out syncscope("workgroup") seq_cst, alig…
46 …it $exec, implicit $flat_scr :: (volatile non-temporal store syncscope("workgroup") seq_cst 4 into…
92 …it $exec, implicit $flat_scr :: (volatile non-temporal store syncscope("workgroup") seq_cst 4 into…
/external/swiftshader/third_party/llvm-7.0/llvm/test/Linker/
Dsyncscopes.ll5 ; CHECK: fence syncscope("workgroup") seq_cst
11 ; CHECK: fence syncscope("workgroup") seq_cst
/external/autotest/client/common_lib/cros/
Dsmbprovider.py88 def mount(self, mount_path, workgroup, username, password): argument
109 proto.workgroup = workgroup
/external/swiftshader/third_party/llvm-7.0/llvm/test/Assembler/
Datomic.ll16 ; CHECK: store atomic volatile i32 3, i32* %x syncscope("workgroup") monotonic, align 4
17 store atomic volatile i32 3, i32* %x syncscope("workgroup") monotonic, align 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/Linker/Inputs/
Dsyncscope-1.ll3 fence syncscope("workgroup") seq_cst
Dsyncscope-2.ll4 fence syncscope("workgroup") seq_cst

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