| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_state.h | 37 return ctx->zsa && ctx->zsa->depth.enabled; in etna_depth_enabled()
43 return ctx->zsa && ctx->zsa->stencil[0].enabled; in etna_stencil_enabled()
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| D | etnaviv_zsa.h | 43 etna_zsa_state(struct pipe_depth_stencil_alpha_state *zsa) in etna_zsa_state() argument
45 return (struct etna_zsa_state *)zsa; in etna_zsa_state()
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| D | etnaviv_emit.c | 475 uint32_t val = etna_zsa_state(ctx->zsa)->PE_DEPTH_CONFIG; in etna_emit_state()
492 uint32_t val = etna_zsa_state(ctx->zsa)->PE_STENCIL_OP; in etna_emit_state()
496 uint32_t val = etna_zsa_state(ctx->zsa)->PE_STENCIL_CONFIG; in etna_emit_state()
500 uint32_t val = etna_zsa_state(ctx->zsa)->PE_ALPHA_OP; in etna_emit_state()
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| D | etnaviv_context.h | 152 struct pipe_depth_stencil_alpha_state *zsa; member
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| /external/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_state.h | 37 return ctx->zsa && ctx->zsa->depth.enabled; in fd_depth_enabled()
42 return ctx->zsa && ctx->zsa->stencil[0].enabled; in fd_stencil_enabled()
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_zsa.h | 48 fd2_zsa_stateobj(struct pipe_depth_stencil_alpha_state *zsa) in fd2_zsa_stateobj() argument
50 return (struct fd2_zsa_stateobj *)zsa; in fd2_zsa_stateobj()
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| D | fd2_emit.c | 188 struct fd2_zsa_stateobj *zsa = fd2_zsa_stateobj(ctx->zsa); in fd2_emit_state() local
209 OUT_RING(ring, zsa->rb_depthcontrol); in fd2_emit_state()
213 OUT_RING(ring, zsa->rb_stencilrefmask_bf | in fd2_emit_state()
215 OUT_RING(ring, zsa->rb_stencilrefmask | in fd2_emit_state()
217 OUT_RING(ring, zsa->rb_alpha_ref); in fd2_emit_state()
299 OUT_RING(ring, zsa->rb_colorcontrol | blend->rb_colorcontrol); in fd2_emit_state()
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_zsa.h | 49 fd3_zsa_stateobj(struct pipe_depth_stencil_alpha_state *zsa) in fd3_zsa_stateobj() argument
51 return (struct fd3_zsa_stateobj *)zsa; in fd3_zsa_stateobj()
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| D | fd3_emit.c | 506 uint32_t val = fd3_zsa_stateobj(ctx->zsa)->rb_render_control | in fd3_emit_state()
526 struct fd3_zsa_stateobj *zsa = fd3_zsa_stateobj(ctx->zsa); in fd3_emit_state() local
530 OUT_RING(ring, zsa->rb_alpha_ref); in fd3_emit_state()
533 OUT_RING(ring, zsa->rb_stencil_control); in fd3_emit_state()
536 OUT_RING(ring, zsa->rb_stencilrefmask | in fd3_emit_state()
538 OUT_RING(ring, zsa->rb_stencilrefmask_bf | in fd3_emit_state()
543 uint32_t val = fd3_zsa_stateobj(ctx->zsa)->rb_depth_control; in fd3_emit_state()
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_zsa.h | 49 fd5_zsa_stateobj(struct pipe_depth_stencil_alpha_state *zsa) in fd5_zsa_stateobj() argument
51 return (struct fd5_zsa_stateobj *)zsa; in fd5_zsa_stateobj()
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| D | fd5_emit.c | 515 struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); in fd5_emit_state() local
516 uint32_t rb_alpha_control = zsa->rb_alpha_control; in fd5_emit_state()
525 OUT_RING(ring, zsa->rb_stencil_control); in fd5_emit_state()
530 struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); in fd5_emit_state() local
534 uint32_t gras_lrz_cntl = zsa->gras_lrz_cntl; in fd5_emit_state()
538 else if (emit->key.binning_pass && blend->lrz_write && zsa->lrz_write) in fd5_emit_state()
547 struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); in fd5_emit_state() local
551 OUT_RING(ring, zsa->rb_stencilrefmask | in fd5_emit_state()
553 OUT_RING(ring, zsa->rb_stencilrefmask_bf | in fd5_emit_state()
558 struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); in fd5_emit_state() local
[all …]
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_zsa.h | 50 fd4_zsa_stateobj(struct pipe_depth_stencil_alpha_state *zsa) in fd4_zsa_stateobj() argument
52 return (struct fd4_zsa_stateobj *)zsa; in fd4_zsa_stateobj()
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| D | fd4_emit.c | 528 struct fd4_zsa_stateobj *zsa = fd4_zsa_stateobj(ctx->zsa); in fd4_emit_state() local
530 uint32_t rb_alpha_control = zsa->rb_alpha_control; in fd4_emit_state()
539 OUT_RING(ring, zsa->rb_stencil_control); in fd4_emit_state()
540 OUT_RING(ring, zsa->rb_stencil_control2); in fd4_emit_state()
544 struct fd4_zsa_stateobj *zsa = fd4_zsa_stateobj(ctx->zsa); in fd4_emit_state() local
548 OUT_RING(ring, zsa->rb_stencilrefmask | in fd4_emit_state()
550 OUT_RING(ring, zsa->rb_stencilrefmask_bf | in fd4_emit_state()
555 struct fd4_zsa_stateobj *zsa = fd4_zsa_stateobj(ctx->zsa); in fd4_emit_state() local
560 OUT_RING(ring, zsa->rb_depth_control | in fd4_emit_state()
569 OUT_RING(ring, zsa->gras_alpha_control | in fd4_emit_state()
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| /external/mesa3d/src/gallium/drivers/vc5/ |
| D | vc5_emit.c | 386 if (vc5->zsa->base.depth.enabled) { in v3dX()
388 vc5->zsa->base.depth.writemask; in v3dX()
390 (vc5->zsa->early_z_enable && in v3dX()
393 vc5->zsa->base.depth.func; in v3dX()
399 vc5->zsa->base.stencil[0].enabled; in v3dX()
504 struct pipe_stencil_state *front = &vc5->zsa->base.stencil[0]; in v3dX()
505 struct pipe_stencil_state *back = &vc5->zsa->base.stencil[1]; in v3dX()
509 vc5->zsa->stencil_front, config) { in v3dX()
517 vc5->zsa->stencil_back, config) { in v3dX()
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| D | vc5_draw.c | 509 if (vc5->zsa && job->zsbuf && in vc5_draw_vbo()
510 (vc5->zsa->base.depth.enabled || in vc5_draw_vbo()
511 vc5->zsa->base.stencil[0].enabled)) { in vc5_draw_vbo()
515 if (vc5->zsa->base.depth.enabled) { in vc5_draw_vbo()
519 if (vc5->zsa->early_z_enable) in vc5_draw_vbo()
523 if (vc5->zsa->base.stencil[0].enabled) { in vc5_draw_vbo()
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| D | vc5_program.c | 366 key->depth_enabled = (vc5->zsa->base.depth.enabled || in vc5_update_compiled_fs()
367 vc5->zsa->base.stencil[0].enabled); in vc5_update_compiled_fs()
368 if (vc5->zsa->base.alpha.enabled) { in vc5_update_compiled_fs()
370 key->alpha_test_func = vc5->zsa->base.alpha.func; in vc5_update_compiled_fs()
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| D | vc5_uniforms.c | 353 vc5->zsa->stencil_uniforms[uinfo->data[i]] | in vc5_write_uniforms()
361 vc5->zsa->base.alpha.ref_value); in vc5_write_uniforms()
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| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_emit.c | 107 vc4->zsa->config_bits[0]) & rasosm_mask_out); in vc4_emit_state()
110 vc4->zsa->config_bits[1]); in vc4_emit_state()
113 vc4->zsa->config_bits[2]) & ez_enable_mask_out); in vc4_emit_state()
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| D | vc4_draw.c | 507 if (vc4->zsa && vc4->framebuffer.zsbuf) { in vc4_draw_vbo()
511 if (vc4->zsa->base.depth.enabled) { in vc4_draw_vbo()
516 if (vc4->zsa->base.stencil[0].enabled) { in vc4_draw_vbo()
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| D | vc4_uniforms.c | 333 vc4->zsa->stencil_uniforms[uinfo->data[i]] | in vc4_write_uniforms()
341 vc4->zsa->base.alpha.ref_value); in vc4_write_uniforms()
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| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
| D | nvc0_state_validate.c | 460 PUSH_SPACE(push, nvc0->zsa->size); in nvc0_validate_zsa()
461 PUSH_DATAp(push, nvc0->zsa->state, nvc0->zsa->size); in nvc0_validate_zsa()
646 bool zs = nvc0->zsa && in nvc0_validate_fp_zsa_rast()
647 (nvc0->zsa->pipe.depth.enabled || nvc0->zsa->pipe.stencil[0].enabled); in nvc0_validate_fp_zsa_rast()
667 if (nvc0->zsa && nvc0->zsa->pipe.alpha.enabled && in nvc0_validate_zsa_fb()
832 if (!ctx_to->zsa) in nvc0_switch_pipe_context()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| D | nv50_state_validate.c | 342 if (nv50->zsa && nv50->zsa->pipe.alpha.enabled && in nv50_validate_derived_2()
398 PUSH_SPACE(push, nv50->zsa->size); in nv50_validate_zsa()
399 PUSH_DATAp(push, nv50->zsa->state, nv50->zsa->size); in nv50_validate_zsa()
483 if (!ctx_to->zsa) in nv50_switch_pipe_context()
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| D | nv50_shader_state.c | 180 if (nv50->zsa && nv50->zsa->pipe.alpha.enabled) { in nv50_fragprog_validate()
197 alphatest = nv50->zsa->pipe.alpha.func + 1; in nv50_fragprog_validate()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nv30_state_validate.c | 309 PUSH_SPACE(push, nv30->zsa->size); in nv30_validate_zsa()
310 PUSH_DATAp(push, nv30->zsa->data, nv30->zsa->size); in nv30_validate_zsa()
456 if (!nv30->zsa) in nv30_state_context_switch()
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| D | nv30_context.h | 67 struct nv30_zsa_stateobj *zsa; member
|