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Searched refs:v5 (Results 1 – 11 of 11) sorted by relevance

/frameworks/rs/cpu_ref/
DrsCpuIntrinsics_advsimd_Convolve.S55 uxtl2 v5.8h, v14.16b
75 smlal v9.4s, v5.4h, v0.h[4]
76 smlal v8.4s, v5.4h, v0.h[5]
77 smlal2 v9.4s, v5.8h, v0.h[5]
151 smull2 v5.4s, v9.8h, v0.h[0]
153 smlal v5.4s, v10.4h, v0.h[1]
155 smlal2 v5.4s, v10.8h, v0.h[2]
157 smlal v5.4s, v11.4h, v0.h[3]
159 smlal2 v5.4s, v11.8h, v0.h[4]
162 smlal2 v5.4s, v12.8h, v0.h[5]
[all …]
DrsCpuIntrinsics_advsimd_Blend.S92 rshrn v5.8b, v1.8h, #8
93 rshrn2 v5.16b, v13.8h, #8
101 uaddw v1.8h, v1.8h, v5.8b
102 uaddw2 v13.8h, v13.8h, v5.16b
138 rshrn v5.8b, v9.8h, #8
139 rshrn2 v5.16b, v13.8h, #8
147 uaddw v9.8h, v9.8h, v5.8b
148 uaddw2 v13.8h, v13.8h, v5.16b
182 rshrn v5.8b, v1.8h, #8
183 rshrn2 v5.16b, v13.8h, #8
[all …]
DrsCpuIntrinsics_advsimd_YuvToRGB.S67 umull2 v5.8h, v8.16b, v24.16b // g0_hi = y0_hi * 149
79 uaddw2 v4.8h, v5.8h, v19.16b // r0_hi = g0_hi + (v_hi >> 1)
87 add v6.8h, v5.8h, v23.8h // b0_hi = g0_hi + (u_hi << 2)
105 …uqadd v5.8h, v5.8h, v30.8h // g0_hi = satu16(g0_hi + (-16 * 149 + 128 * 50 + 128 * 10…
119 uqsub v5.8h, v5.8h, v9.8h // g0_hi = satu16(g0_hi - g2_hi)
133 uqrshrn v5.8b, v5.8h, #7
143 zip1 v5.16b, v5.16b, v21.16b
DrsCpuIntrinsics_advsimd_Blur.S534 123: ext v12.16b, v4.16b, v5.16b, #0*2
540 122: ext v12.16b, v4.16b, v5.16b, #1*2
546 121: ext v12.16b, v4.16b, v5.16b, #2*2
552 120: ext v12.16b, v4.16b, v5.16b, #3*2
558 119: ext v12.16b, v4.16b, v5.16b, #4*2
564 118: ext v12.16b, v4.16b, v5.16b, #5*2
570 117: ext v12.16b, v4.16b, v5.16b, #6*2
576 116: ext v12.16b, v4.16b, v5.16b, #7*2
582 115: ext v12.16b, v5.16b, v6.16b, #0*2
588 114: ext v12.16b, v5.16b, v6.16b, #1*2
[all …]
DrsCpuIntrinsics_advsimd_3DLUT.S38 zip1 v12.16b, v5.16b, v16.16b
39 zip1 v13.16b, v5.16b, v17.16b
55 zip1 v14.16b, v5.16b, v16.16b
56 zip1 v15.16b, v5.16b, v17.16b
125 movi v5.16b, #0
DrsCpuIntrinsics_advsimd_ColorMatrix.S248 vadd_f32 \i, 16, v9.4s, v9.4s, v5.4s, v9.16b, v5.16b
253 vadd_f32 \i, 16, v17.4s, v17.4s, v5.4s, v17.16b, v5.16b
262 vadd_f32 \i^31, 16, v9.4s, v9.4s, v5.4s, v9.16b, v5.16b
267 vadd_f32 \i^31, 16, v17.4s, v17.4s, v5.4s, v17.16b, v5.16b
1132 ld1r {v5.4s}, [x5], #4
1141 mov v9.16b, v5.16b
1146 mov v17.16b, v5.16b
DrsCpuIntrinsics_advsimd_Resize.S172 ld1 {v5.8h}, [x9]
176 mla v6.8h, v5.8h, v7.8h // vxf
/frameworks/native/libs/math/tests/
Dvec_test.cpp72 vec4 v5(vec3(v2.xy, 42), 24); in TEST_F() local
73 EXPECT_EQ(v5.x, 1); in TEST_F()
74 EXPECT_EQ(v5.y, 2); in TEST_F()
75 EXPECT_EQ(v5.z, 42); in TEST_F()
76 EXPECT_EQ(v5.w, 24); in TEST_F()
/frameworks/compile/mclinker/unittests/
DGCFactoryListTraitsTest.cpp62 #define CHECK_LIST_VALUE(v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ argument
69 CHECK_NODE_VALUE(v5); \
/frameworks/base/services/tests/servicestests/res/raw/
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