Searched defs:ShiftReg (Results 1 – 12 of 12) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 1085 unsigned ShiftReg = RI.createVirtualRegister(RC); in EmitShiftInstr() local
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 354 unsigned ShiftReg; member 1507 unsigned ShiftReg, in CreateShiftedRegister() 1890 int ShiftReg = 0; in tryParseShiftRegister() local
|
/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 1231 unsigned ShiftReg = RI.createVirtualRegister(RC); in EmitShiftInstr() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.cpp | 1511 unsigned ShiftReg = RI.createVirtualRegister(RC); in insertShift() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 1453 unsigned ShiftReg = RI.createVirtualRegister(RC); in EmitShiftInstr() local
|
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 4752 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local 5074 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
|
/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 537 unsigned ShiftReg; member 2650 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister() 3123 int ShiftReg = 0; in tryParseShiftRegister() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 771 unsigned ShiftReg; member 2966 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister() 3450 int ShiftReg = 0; in tryParseShiftRegister() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 3680 unsigned ShiftReg = emitLSR_ri(MVT::i64, MVT::i64, MulReg, in fastLowerIntrinsicCall() local
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 3594 unsigned ShiftReg = emitLSR_ri(MVT::i64, MVT::i64, MulReg, in fastLowerIntrinsicCall() local
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 8543 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local 9258 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 9839 unsigned ShiftReg = in EmitPartwordAtomicBinary() local 10626 unsigned ShiftReg = in EmitInstrWithCustomInserter() local
|