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Searched defs:reg_val (Results 1 – 25 of 33) sorted by relevance

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/external/u-boot/include/
Dbitfield.h48 static inline uint bitfield_extract(uint reg_val, uint shift, uint width) in bitfield_extract()
57 static inline uint bitfield_replace(uint reg_val, uint shift, uint width, in bitfield_replace()
72 static inline uint bitfield_extract_by_mask(uint reg_val, uint mask) in bitfield_extract_by_mask()
83 static inline uint bitfield_replace_by_mask(uint reg_val, uint mask, in bitfield_replace_by_mask()
/external/u-boot/drivers/video/tegra124/
Dsor.c62 u32 reg_val = tegra_sor_readl(sor, reg); in tegra_sor_write_field() local
93 u32 reg_val = 0; in tegra_dc_sor_poll_register() local
113 u32 reg_val; in tegra_dc_sor_set_power_state() local
144 u32 reg_val; in tegra_dc_sor_set_dp_linkctl() local
180 u32 reg_val; in tegra_dc_sor_enable_lane_sequencer() local
215 u32 reg_val; in tegra_dc_sor_power_dplanes() local
245 u32 reg_val; in tegra_dc_sor_set_panel_power() local
277 u32 reg_val; in tegra_dc_sor_set_dp_mode() local
326 u32 reg_val; in tegra_dc_sor_io_set_dpd() local
373 u32 reg_val; in tegra_dc_sor_set_internal_panel() local
[all …]
Ddisplay.c100 u32 reg_val = 0; in tegra_dc_poll_register() local
Ddp.c57 u32 reg_val = 0; in tegra_dc_dpaux_poll_register() local
95 u32 reg_val; in tegra_dc_dpaux_write_chunk() local
191 u32 reg_val; in tegra_dc_dpaux_read_chunk() local
/external/u-boot/drivers/usb/musb-new/
Dsunxi.c94 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val) in USBC_WakeUp_ClearChangeDetect()
107 u32 reg_val; in USBC_EnableIdPullUp() local
117 u32 reg_val; in USBC_EnableDpDmPullUp() local
127 u32 reg_val; in USBC_ForceIdToLow() local
138 u32 reg_val; in USBC_ForceIdToHigh() local
149 u32 reg_val; in USBC_ForceVbusValidToLow() local
160 u32 reg_val; in USBC_ForceVbusValidToHigh() local
/external/u-boot/drivers/mtd/nand/
Dtegra_nand.c117 u32 reg_val; in nand_waitfor_cmd_completion() local
207 int reg_val; in nand_dev_ready() local
239 u32 reg_val; in nand_clear_interrupt_status() local
391 u32 reg_val; in check_ecc_error() local
435 u32 reg_val; in start_command() local
466 struct fdt_nand *config, u32 *reg_val) in set_bus_width_page_size()
508 u32 reg_val; in nand_rw_page() local
724 u32 reg_val; in nand_rw_oob() local
856 u32 reg_val, clk_rate, clk_period, time_val; in setup_timing() local
Darasan_nfc.c268 u32 reg_val; in arasan_nand_enable_ecc() local
315 u32 reg_val, i, pktsize, pktnum; in arasan_nand_read_page() local
490 u32 reg_val, i, pktsize, pktnum; in arasan_nand_write_page_hwecc() local
679 u32 reg_val, page; in arasan_nand_send_wrcmd() local
725 u32 reg_val; in arasan_nand_write_buf() local
776 u32 reg_val, page; in arasan_nand_erase() local
835 u32 reg_val; in arasan_nand_read_status() local
891 u32 reg_val, addr_cycles, page; in arasan_nand_send_rdcmd() local
945 u32 reg_val, i; in arasan_nand_read_buf() local
Dkmeter1_nand.c50 u8 reg_val = read_mode(); in kpn_nand_hwcontrol() local
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun4i.c66 u32 reg_val; in mctl_ddr3_reset() local
239 u32 reg_val; in mctl_setup_dram_clock() local
387 u32 reg_val; in dramc_scan_readpipe() local
513 u32 reg_val; in mctl_set_impedance() local
564 u32 reg_val; in dramc_init_helper() local
Dcpu_info.c116 uint32_t reg_val; in sun8i_efuse_read() local
Ddram_sun8i_a33.c90 u32 reg_val; in auto_set_timing_para() local
Ddram_sun8i_a83t.c90 u32 reg_val; in auto_set_timing_para() local
/external/u-boot/drivers/power/regulator/
Dsandbox.c82 uint8_t reg_val; in out_get_value() local
109 uint8_t reg_val; in out_set_value() local
144 uint8_t reg_val; in out_get_mode() local
170 int reg_val = -1; in out_set_mode() local
/external/u-boot/drivers/net/phy/
Dmscc.c139 u16 reg_val; in mscc_vsc8531_vsc8541_init_scripts() local
248 u16 reg_val = 0; in mscc_phy_soft_reset() local
275 u16 reg_val = 0; in vsc8531_vsc8541_mac_config() local
343 u16 reg_val; in vsc8531_config() local
403 u16 reg_val; in vsc8541_config() local
Dbroadcom.c40 int reg_val; in bcm_phy_write_misc() local
/external/u-boot/arch/arm/mach-imx/mx7/
Dddr.c114 u32 reg_val, field_val; in imx_ddr_size() local
/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_plat.c246 u32 reg_val = data; in dunit_write() local
572 u32 reg_val; in is_prfa_done() local
593 u32 reg_val = ((data & PRFA_DATA_MASK) << PRFA_DATA_OFFS) | in prfa_write() local
617 u32 i, reg_val; in prfa_read() local
1216 u32 reg_val; in mv_ddr_pre_training_soc_config() local
1325 u32 reg_val; in mv_ddr_post_training_soc_config() local
/external/u-boot/board/sunxi/
Dahci.c19 u32 reg_val; in sunxi_ahci_phy_init() local
/external/u-boot/arch/arm/mach-exynos/
Dlowlevel_init.c66 uint32_t val, reg_val; in low_power_start() local
/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/
Dsys_env_lib.h109 #define REF_CLK_SELECTOR_VAL_PEX0(reg_val) (reg_val >> 2) & 0x1 argument
110 #define REF_CLK_SELECTOR_VAL_PEX1(reg_val) (reg_val >> 3) & 0x1 argument
111 #define REF_CLK_SELECTOR_VAL_PEX2(reg_val) (reg_val >> 30) & 0x1 argument
112 #define REF_CLK_SELECTOR_VAL_PEX3(reg_val) (reg_val >> 31) & 0x1 argument
113 #define REF_CLK_SELECTOR_VAL(reg_val) (reg_val & 0x1) argument
/external/u-boot/arch/arm/mach-omap2/
Dvc.c101 u32 reg_val; in omap_vc_bypass_send_value() local
/external/u-boot/arch/arm/mach-zynq/
Dslcr.c127 u32 reg_val; in zynq_slcr_devcfg_disable() local
/external/u-boot/drivers/video/
Dati_radeon_fb.c296 } reg_val; typedef
/external/u-boot/board/micronas/vct/
Dsmc_eeprom.c87 ulong reg_val = 0xffffffff; in get_mac_reg() local
/external/u-boot/drivers/net/
Dsunxi_emac.c284 u32 reg_val; in emac_setup() local
411 u32 reg_val; in _sunxi_emac_eth_recv() local

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