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Searched refs:CA_CKE_DRVR_DS_OFFSET (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Ddmc_init_ddr3.c52 (mem->impedance << CA_CKE_DRVR_DS_OFFSET) | in ddr3_mem_ctrl_init()
521 val = (0x7 << CA_CK_DRVR_DS_OFFSET) | (0x7 << CA_CKE_DRVR_DS_OFFSET) | in ddr3_mem_ctrl_init()
Dexynos5_setup.h428 #define CA_CKE_DRVR_DS_OFFSET 6 macro