| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 3964 CHECK_T32_16(Adc(DontCare, r7, r7, r6), "adcs r7, r6\n"); in TEST()
3966 CHECK_T32_16_IT_BLOCK(Adc(DontCare, eq, r7, r7, r6), in TEST()
3970 CHECK_T32_16(Add(DontCare, r6, r7, 7), "adds r6, r7, #7\n"); in TEST()
3972 CHECK_T32_16_IT_BLOCK(Add(DontCare, lt, r6, r7, 7), in TEST()
3976 CHECK_T32_16(Add(DontCare, r5, r5, 255), "adds r5, #255\n"); in TEST()
3978 CHECK_T32_16_IT_BLOCK(Add(DontCare, lt, r5, r5, 255), in TEST()
3984 CHECK_T32_16(Add(DontCare, r1, r1, r2), "add r1, r2\n"); in TEST()
3986 CHECK_T32_16(Add(DontCare, r1, r2, r7), "adds r1, r2, r7\n"); in TEST()
3988 CHECK_T32_16_IT_BLOCK(Add(DontCare, lt, r1, r2, r7), in TEST()
3992 CHECK_T32_16(Add(DontCare, r4, r4, r12), "add r4, ip\n"); in TEST()
[all …]
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| D | test-assembler-aarch32.cc | 5970 CHECK_SIZE_MATCH(Add(DontCare, r1, r2, r7), Add(DontCare, r1, r7, r2)); in TEST_T32()
5972 CHECK_SIZE_MATCH(Add(DontCare, lt, r1, r2, r7), in TEST_T32()
5973 Add(DontCare, lt, r1, r7, r2)); in TEST_T32()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | SpillPlacement.h | 71 DontCare, ///< Block doesn't care / variable not live. enumerator
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| D | SpillPlacement.cpp | 228 if (I->Entry != DontCare) { in addConstraints()
235 if (I->Exit != DontCare) { in addConstraints()
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| D | RegAllocGreedy.cpp | 685 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
686 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | SpillPlacement.h | 82 DontCare, ///< Block doesn't care / variable not live. enumerator
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| D | SpillPlacement.cpp | 270 if (I->Entry != DontCare) { in addConstraints()
277 if (I->Exit != DontCare) { in addConstraints()
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| D | RegAllocGreedy.cpp | 1185 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
1186 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
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| /external/llvm/lib/CodeGen/ |
| D | SpillPlacement.h | 82 DontCare, ///< Block doesn't care / variable not live. enumerator
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| D | SpillPlacement.cpp | 262 if (I->Entry != DontCare) { in addConstraints()
269 if (I->Exit != DontCare) { in addConstraints()
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| D | RegAllocGreedy.cpp | 947 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
948 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 47 enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 }; enumerator
1018 case DontCare: in Adc()
1102 case DontCare: in Add()
1192 case DontCare: in And()
1261 case DontCare: in Asr()
1386 case DontCare: in Bic()
1730 case DontCare: in Eor()
2283 case DontCare: in Lsl()
2350 case DontCare: in Lsr()
2412 case DontCare: in Mla()
[all …]
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