/external/llvm/lib/Target/Mips/ |
D | MipsSERegisterInfo.cpp | 157 bool IsKill = false; in eliminateFI() local 192 IsKill = true; in eliminateFI() 209 IsKill = true; in eliminateFI() 213 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
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D | Mips16RegisterInfo.cpp | 126 bool IsKill = false; in eliminateFI() local 142 IsKill = true; in eliminateFI() 144 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | Mips16RegisterInfo.cpp | 126 bool IsKill = false; in eliminateFI() local 142 IsKill = true; in eliminateFI() 144 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
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D | MipsSERegisterInfo.cpp | 201 bool IsKill = false; in eliminateFI() local 238 IsKill = true; in eliminateFI() 255 IsKill = true; in eliminateFI() 259 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | MachineOperand.h | 80 bool IsKill : 1; variable 253 return IsKill; in isKill() 333 IsKill = Val; 498 Op.IsKill = isKill;
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.cpp | 179 bool IsKill = false; in eliminateFrameIndex() local 205 IsKill = true; in eliminateFrameIndex() 208 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, IsKill); in eliminateFrameIndex()
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D | HexagonFrameLowering.cpp | 1089 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); in insertCSRSpillsInBlock() local 1092 HII.storeRegToStackSlot(MBB, MI, Reg, IsKill, FI, RC, &HRI); in insertCSRSpillsInBlock() 1093 if (IsKill) in insertCSRSpillsInBlock() 1404 bool IsKill = MI->getOperand(2).isKill(); in expandStoreInt() local 1415 .addReg(SrcR, getKillRegState(IsKill)); in expandStoreInt() 1467 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVecPred() local 1488 .addReg(SrcR, getKillRegState(IsKill)) in expandStoreVecPred() 1552 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec2() local 1574 .addReg(SrcLo, getKillRegState(IsKill)) in expandStoreVec2() 1586 .addReg(SrcHi, getKillRegState(IsKill)) in expandStoreVec2() [all …]
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D | HexagonFrameLowering.h | 142 bool IsDef, bool IsKill) const;
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D | HexagonBlockRanges.cpp | 318 bool IsKill = Op.isKill(); in computeInitialLiveRanges() local 321 if (IsKill) in computeInitialLiveRanges()
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/external/llvm/lib/Target/BPF/ |
D | BPFInstrInfo.cpp | 47 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument 56 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
D | BPFInstrInfo.cpp | 127 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument 136 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot() 141 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineOperand.h | 95 bool IsKill : 1; variable 299 return IsKill; in isKill() 378 IsKill = Val; 618 Op.IsKill = isKill;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.cpp | 213 bool IsKill = false; in eliminateFrameIndex() local 239 IsKill = true; in eliminateFrameIndex() 242 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, IsKill); in eliminateFrameIndex()
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D | HexagonFrameLowering.cpp | 1238 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); in insertCSRSpillsInBlock() local 1241 HII.storeRegToStackSlot(MBB, MI, Reg, IsKill, FI, RC, &HRI); in insertCSRSpillsInBlock() 1242 if (IsKill) in insertCSRSpillsInBlock() 1569 bool IsKill = MI->getOperand(2).isKill(); in expandStoreInt() local 1578 .addReg(SrcR, getKillRegState(IsKill)); in expandStoreInt() 1632 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVecPred() local 1647 .addReg(SrcR, getKillRegState(IsKill)) in expandStoreVecPred() 1721 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec2() local 1736 .addReg(SrcLo, getKillRegState(IsKill)) in expandStoreVec2() 1747 .addReg(SrcHi, getKillRegState(IsKill)) in expandStoreVec2() [all …]
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D | HexagonBlockRanges.cpp | 327 bool IsKill = Op.isKill(); in computeInitialLiveRanges() local 330 if (IsKill) in computeInitialLiveRanges()
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D | HexagonFrameLowering.h | 168 bool IsDef, bool IsKill) const;
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/external/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.cpp | 419 bool IsKill = SrcDst->isKill(); in buildScratchLoadStore() local 473 SrcDstRegState |= getKillRegState(IsKill); in buildScratchLoadStore() 521 bool IsKill = MI->getOperand(0).isKill(); in eliminateFrameIndex() local 523 unsigned SubKillState = getKillRegState((NumSubRegs == 1) && IsKill); in eliminateFrameIndex() 535 .addReg(SubReg, getKillRegState(IsKill)) in eliminateFrameIndex() 555 SuperKillState |= getKillRegState(IsKill); in eliminateFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.cpp | 519 bool IsKill, in buildSpillLoadStore() argument 593 SrcDstRegState |= getKillRegState(IsKill); in buildSpillLoadStore() 602 .addReg(SubReg, getDefRegState(!IsStore) | getKillRegState(IsKill)) in buildSpillLoadStore() 659 bool IsKill = MI->getOperand(0).isKill(); in spillSGPR() local 699 unsigned SubKillState = getKillRegState((NumSubRegs == 1) && IsKill); in spillSGPR() 735 .addReg(SubReg, getKillRegState(IsKill)) // sdata in spillSGPR() 759 .addReg(SubReg, getKillRegState(IsKill)) in spillSGPR() 787 SuperKillState |= getKillRegState(IsKill); in spillSGPR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfo.h | 41 bool IsKill, int FrameIndex,
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D | RISCVInstrInfo.cpp | 111 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument 131 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64AdvSIMDScalarPass.cpp | 276 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy() argument 279 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64AdvSIMDScalarPass.cpp | 283 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy() argument 286 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.h | 57 unsigned SourceRegister, bool IsKill, int FrameIndex,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.h | 58 unsigned SourceRegister, bool IsKill, int FrameIndex,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | ScheduleDAGInstrs.cpp | 378 bool IsKill = MO.getSubReg() == 0 || MO.isUndef(); in addVRegDefDeps() local 382 KillLaneMask = IsKill ? LaneBitmask::getAll() : DefLaneMask; in addVRegDefDeps() 1041 bool IsKill = LiveRegs.available(MRI, Reg); in toggleKills() local 1042 MO.setIsKill(IsKill); in toggleKills()
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