/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 90 case AArch64::Q21: in isOdd()
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D | AArch64RegisterInfo.td | 395 def Q21 : AArch64Reg<21, "q21", [D21], ["v21", ""]>, DwarfRegAlias<B21>; 754 def Z21 : AArch64Reg<21, "z21", [Q21, Z21_HI]>, DwarfRegNum<[117]>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 90 case AArch64::Q21: in isOdd()
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D | AArch64RegisterInfo.td | 376 def Q21 : AArch64Reg<21, "q21", [D21], ["v21", ""]>, DwarfRegAlias<B21>;
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 1248 case AArch64::Q20: Reg = AArch64::Q21; break; in getNextVectorRegister() 1249 case AArch64::Q21: Reg = AArch64::Q22; break; in getNextVectorRegister()
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/external/ImageMagick/PerlMagick/t/reference/jpeg/ |
D | write_non_interlaced.miff | 16 …�\V�LT�AM�?G�&C�,K�5U�;`�>e�?k�Am�Bo�[|�W^fNB^H;�}p�������������ν�ɽ���syoX`Q21,43/:65@<;FA>JF=MG;L…
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D | write_plane_interlaced.miff | 16 …�\V�LT�AM�?G�&C�,K�5U�;`�>e�?k�Am�Bo�[|�W^fNB^H;�}p�������������ν�ɽ���syoX`Q21,43/:65@<;FA>JF=MG;L…
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 1136 case AArch64::Q20: Reg = AArch64::Q21; break; in getNextVectorRegister() 1137 case AArch64::Q21: Reg = AArch64::Q22; break; in getNextVectorRegister()
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/external/honggfuzz/examples/apache-httpd/corpus_http1/ |
D | 9345978bb5e6017552a53df907b2037a.0000cbf9.honggfuzz.cov | 76 F�Pwu�t��!U�5�����}8�yUe��>��@�!�mK`��l��j�l��::�*�@̈�NL�"�OO��(�Q21���T�����Q�M�$�)-���w��Л… 196 F�Pwu�t��!U�5�����}8�yUe��>��@�!�mK`��l��j�l��::�*�@̈�NL�"�OO��(�Q21���T�����Q�M�$�)-���w��Л…
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/external/honggfuzz/examples/apache-httpd/corpus_http2/ |
D | 9345978bb5e6017552a53df907b2037a.0000cbf9.honggfuzz.cov | 76 F�Pwu�t��!U�5�����}8�yUe��>��@�!�mK`��l��j�l��::�*�@̈�NL�"�OO��(�Q21���T�����Q�M�$�)-���w��Л… 196 F�Pwu�t��!U�5�����}8�yUe��>��@�!�mK`��l��j�l��::�*�@̈�NL�"�OO��(�Q21���T�����Q�M�$�)-���w��Л…
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/external/ImageMagick/PerlMagick/t/reference/write/jpeg/ |
D | write_non_interlaced.miff | 45 …�\V�LT�AM�?G�&C�,K�5U�;`�>e�?k�Am�Bo�\}�W^gOC_I<�}p�������������ν�ɽ���syoX`Q21,43/:65@<;FA>JF=MG;L…
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D | write_plane_interlaced.miff | 45 …�\V�LT�AM�?G�&C�,K�5U�;`�>e�?k�Am�Bo�\}�W^gOC_I<�}p�������������ν�ɽ���syoX`Q21,43/:65@<;FA>JF=MG;L…
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 260 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, 440 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 301 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, 625 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
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/external/ImageMagick/MagickCore/ |
D | enhance.c | 409 const size_t *Q22,const size_t *Q11,const size_t *Q21, in InterpolateCLAHE() argument 431 (tile->height-y)*(x*Q11[intensity]+(tile->width-x)*Q21[intensity]))); in InterpolateCLAHE()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenRegisterInfo.inc | 162 Q21 = 142, 2593 …h64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArc… 3841 { AArch64::Q21, 85U }, 4120 { AArch64::Q21, 85U }, 19336 …h64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArc… 19338 …h64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArc… 19356 …h64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArc… 19358 …h64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArc… 19360 …h64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArc…
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D | AArch64GenAsmMatcher.inc | 10854 case AArch64::Q21: OpKind = MCK_FPR128; break;
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 1878 .Case("v21", AArch64::Q21) in matchVectorRegName()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 2073 .Case("v21", AArch64::Q21) in MatchNeonVectorRegName()
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