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Searched refs:SD1CKCR (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/board/renesas/alt/
Dalt.c48 #define SD1CKCR 0xE6150078 macro
57 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
Dalt_spl.c26 #define SD1CKCR 0xE6150078 macro
365 writel(SD_97500KHZ, SD1CKCR); in board_init_f()
/external/u-boot/board/renesas/silk/
Dsilk.c48 #define SD1CKCR 0xE6150078 macro
57 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
Dsilk_spl.c26 #define SD1CKCR 0xE6150078 macro
379 writel(SD_97500KHZ, SD1CKCR); in board_init_f()
/external/u-boot/board/renesas/gose/
Dgose.c50 #define SD1CKCR 0xE6150078 macro
62 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
/external/u-boot/board/renesas/koelsch/
Dkoelsch.c52 #define SD1CKCR 0xE6150078 macro
64 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
/external/u-boot/board/renesas/lager/
Dlager.c61 #define SD1CKCR 0xE6150078 macro
73 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()