Searched refs:ShiftOpcode (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCompares.cpp | 1694 unsigned ShiftOpcode = Shift->getOpcode(); in visitICmpInstWithInstAndIntCst() local 1695 if (ShiftOpcode == Instruction::AShr) { in visitICmpInstWithInstAndIntCst() 1699 } else if (ShiftOpcode == Instruction::Shl) { in visitICmpInstWithInstAndIntCst() 1707 } else if (ShiftOpcode == Instruction::LShr) { in visitICmpInstWithInstAndIntCst() 1728 if (ShiftOpcode == Instruction::Shl) in visitICmpInstWithInstAndIntCst() 1735 if (ConstantExpr::get(ShiftOpcode, NewCst, ShAmt) != RHS) { in visitICmpInstWithInstAndIntCst() 1746 if (ShiftOpcode == Instruction::Shl) in visitICmpInstWithInstAndIntCst()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCompares.cpp | 1526 unsigned ShiftOpcode = Shift->getOpcode(); in foldICmpAndShift() local 1527 bool IsShl = ShiftOpcode == Instruction::Shl; in foldICmpAndShift() 1531 if (ShiftOpcode == Instruction::Shl) { in foldICmpAndShift() 1539 bool IsAshr = ShiftOpcode == Instruction::AShr; in foldICmpAndShift()
|
/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 1690 constexpr IValueT ShiftOpcode = B3 | B2 | B0; // 1101 in emitShift() local 1706 emitType01(Cond, kInstTypeDataRegShift, ShiftOpcode, SetFlags, Rn, Rd, in emitShift() 1721 emitType01(Cond, kInstTypeDataRegShift, ShiftOpcode, SetFlags, Rn, Rd, in emitShift()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 23626 unsigned ShiftOpcode = Op->getOpcode(); in LowerShift() local 23666 DAG.getNode(ShiftOpcode, dl, VT, R, DAG.getConstant(4, dl, VT)); in LowerShift() 23673 M = DAG.getNode(ShiftOpcode, dl, VT, R, DAG.getConstant(2, dl, VT)); in LowerShift() 23680 M = DAG.getNode(ShiftOpcode, dl, VT, R, DAG.getConstant(1, dl, VT)); in LowerShift() 23699 SDValue MLo = DAG.getNode(ShiftOpcode, dl, ExtVT, RLo, in LowerShift() 23701 SDValue MHi = DAG.getNode(ShiftOpcode, dl, ExtVT, RHi, in LowerShift() 23711 MLo = DAG.getNode(ShiftOpcode, dl, ExtVT, RLo, in LowerShift() 23713 MHi = DAG.getNode(ShiftOpcode, dl, ExtVT, RHi, in LowerShift() 23723 MLo = DAG.getNode(ShiftOpcode, dl, ExtVT, RLo, in LowerShift() 23725 MHi = DAG.getNode(ShiftOpcode, dl, ExtVT, RHi, in LowerShift() [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 8351 auto ShiftOpcode = N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SRA : ISD::SRL; in foldExtendedSignBitTest() local 8352 return DAG.getNode(ShiftOpcode, DL, VT, NotX, ShiftAmount); in foldExtendedSignBitTest()
|