Home
last modified time | relevance | path

Searched refs:UART_RSA_BASE (Results 1 – 2 of 2) sorted by relevance

/external/kernel-headers/original/uapi/linux/
Dserial_reg.h289 #define UART_RSA_BASE (-8) macro
291 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */
298 #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */
306 #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */
317 #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */
319 #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */
321 #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */
/external/u-boot/include/linux/
Dserial_reg.h298 #define UART_RSA_BASE (-8) macro
300 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */
307 #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */
315 #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */
326 #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */
328 #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */
330 #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */