Searched refs:WORKITEM_ID_X (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUArgumentUsageInfo.h | 97 WORKITEM_ID_X = 17, enumerator
100 FIRST_VGPR_VALUE = WORKITEM_ID_X
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| D | AMDGPUArgumentUsageInfo.cpp | 117 case AMDGPUFunctionArgInfo::WORKITEM_ID_X: in getPreloadedValue()
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| D | SIISelLowering.cpp | 2264 AMDGPUFunctionArgInfo::WORKITEM_ID_X, in passSpecialInputs()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 170 WORKITEM_ID_X = FIRST_VGPR_VALUE, enumerator
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| D | SIRegisterInfo.cpp | 944 case SIRegisterInfo::WORKITEM_ID_X: in getPreloadedValue()
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| D | SIISelLowering.cpp | 914 unsigned Reg = TRI->getPreloadedValue(MF, SIRegisterInfo::WORKITEM_ID_X); in LowerFormalArguments()
1788 TRI->getPreloadedValue(MF, SIRegisterInfo::WORKITEM_ID_X), VT); in LowerINTRINSIC_WO_CHAIN()
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | amdgpu.private-memory.ll | 61 ; HSAOPT: [[WORKITEM_ID_X:%[0-9]+]] = call i32 @llvm.amdgcn.workitem.id.x(), !range !1
66 ; HSAOPT: [[YZ_X_XID:%[0-9]+]] = mul i32 [[Y_SIZE_X_Z_SIZE]], [[WORKITEM_ID_X]]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | amdgpu.private-memory.ll | 60 ; HSAOPT: [[WORKITEM_ID_X:%[0-9]+]] = call i32 @llvm.amdgcn.workitem.id.x(), !range !2
65 ; HSAOPT: [[YZ_X_XID:%[0-9]+]] = mul i32 [[Y_SIZE_X_Z_SIZE]], [[WORKITEM_ID_X]]
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