Searched refs:ZYNQ_GEM_NWSR_MDIOIDLE_MASK (Results 1 – 1 of 1) sorted by relevance
79 #define ZYNQ_GEM_NWSR_MDIOIDLE_MASK 0x00000004 /* PHY management idle */ macro195 err = wait_for_bit_le32(®s->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK, in phy_setup_op()208 err = wait_for_bit_le32(®s->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK, in phy_setup_op()