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Searched refs:div_isp1 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock.c494 div = readl(&clk->div_isp1); in exynos542x_get_periph_rate()
495 sub_div = readl(&clk->div_isp1); in exynos542x_get_periph_rate()
1536 reg = &clk->div_isp1; in exynos5420_set_spi_clk()
1538 pre_reg = &clk->div_isp1; in exynos5420_set_spi_clk()
1542 reg = &clk->div_isp1; in exynos5420_set_spi_clk()
1544 pre_reg = &clk->div_isp1; in exynos5420_set_spi_clk()
Dclock_init_exynos5.c769 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5250_system_clock_init()
947 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5420_system_clock_init()
/external/u-boot/arch/arm/mach-exynos/include/mach/
Dclock.h498 unsigned int div_isp1; member
635 unsigned int div_isp1; member
1141 unsigned int div_isp1; member