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Searched refs:div_mau (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/include/mach/
Dclock.h721 unsigned int div_mau; member
1129 unsigned int div_mau; member
/external/u-boot/arch/arm/mach-exynos/
Dclock.c390 div = sub_div = readl(&clk->div_mau); in exynos5_get_periph_rate()
1362 clrsetbits_le32(&clk->div_mau, AUDIO_0_RATIO_MASK, in exynos5_set_i2s_clk_prescaler()
Dclock_init_exynos5.c937 writel(DIV_MAU_VAL, &clk->div_mau); in exynos5420_system_clock_init()