| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 458 ldxrb w6, [x1]
463 ; CHECK: ldxrb w6, [x1] ; encoding: [0x26,0x7c,0x5f,0x08]
|
| D | basic-a64-instructions.s | 2266 ldxrb w7, [x9]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 458 ldxrb w6, [x1]
463 ; CHECK: ldxrb w6, [x1] ; encoding: [0x26,0x7c,0x5f,0x08]
|
| D | basic-a64-instructions.s | 2249 ldxrb w7, [x9]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | atomic-ops.ll | 103 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
183 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
423 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
694 ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
|
| D | arm64-ldxr-stxr.ll | 37 ; CHECK: ldxrb w[[LOADVAL:[0-9]+]], [x0]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | atomic-ops.ll | 103 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
183 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
423 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
695 ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
|
| D | arm64-ldxr-stxr.ll | 37 ; CHECK: ldxrb w[[LOADVAL:[0-9]+]], [x0]
|
| /external/vixl/ |
| D | README.md | 124 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 444 # CHECK: ldxrb w6, [x1]
|
| D | basic-a64-instructions.txt | 1913 #CHECK: ldxrb w30, [x0]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 444 # CHECK: ldxrb w6, [x1]
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1884 COMPARE(ldxrb(w30, MemOperand(x0)), "ldxrb w30, [x0]"); in TEST()
1885 COMPARE(ldxrb(w1, MemOperand(sp)), "ldxrb w1, [sp]"); in TEST()
1886 COMPARE(ldxrb(x2, MemOperand(x3)), "ldxrb w2, [x3]"); in TEST()
1887 COMPARE(ldxrb(x4, MemOperand(sp)), "ldxrb w4, [sp]"); in TEST()
|
| D | test-trace-aarch64.cc | 224 __ ldxrb(w29, MemOperand(x0)); in GenerateTestSequenceBase() local
225 __ ldxrb(x2, MemOperand(x0)); in GenerateTestSequenceBase() local
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 880 0x27,0x7d,0x5f,0x08 = ldxrb w7, [x9]
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1328 void ldxrb(const Register& rt, const MemOperand& src);
|
| D | macro-assembler-aarch64.h | 1897 ldxrb(rt, src); in Ldxrb()
|
| D | assembler-aarch64.cc | 1384 void Assembler::ldxrb(const Register& rt, const MemOperand& src) { in ldxrb() function in vixl::aarch64::Assembler
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 171 0x~~~~~~~~~~~~~~~~ 085f7c1d ldxrb w29, [x0]
172 0x~~~~~~~~~~~~~~~~ 085f7c02 ldxrb w2, [x0]
|
| D | log-disasm-colour | 171 0x~~~~~~~~~~~~~~~~ 085f7c1d ldxrb w29, [x0]
172 0x~~~~~~~~~~~~~~~~ 085f7c02 ldxrb w2, [x0]
|
| D | log-cpufeatures-custom | 171 0x~~~~~~~~~~~~~~~~ 085f7c1d ldxrb w29, [x0]
172 0x~~~~~~~~~~~~~~~~ 085f7c02 ldxrb w2, [x0]
|
| D | log-cpufeatures | 171 0x~~~~~~~~~~~~~~~~ 085f7c1d ldxrb w29, [x0]
172 0x~~~~~~~~~~~~~~~~ 085f7c02 ldxrb w2, [x0]
|
| D | log-cpufeatures-colour | 171 0x~~~~~~~~~~~~~~~~ 085f7c1d ldxrb w29, [x0]
172 0x~~~~~~~~~~~~~~~~ 085f7c02 ldxrb w2, [x0]
|
| D | log-all | 449 0x~~~~~~~~~~~~~~~~ 085f7c1d ldxrb w29, [x0]
451 0x~~~~~~~~~~~~~~~~ 085f7c02 ldxrb w2, [x0]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 725 void ldxrb(const Register& rt, const MemOperand& src)
|