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Searched refs:mux_mode (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7ulp/
Diomux.c25 u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; in mx7ulp_iomux_setup_pad() local
34 pad, mux_ctrl_ofs, mux_mode, sel_input_ofs, sel_input, in mx7ulp_iomux_setup_pad()
37 if (mux_mode & IOMUX_CONFIG_MPORTS) { in mx7ulp_iomux_setup_pad()
38 mux_mode &= ~IOMUX_CONFIG_MPORTS; in mx7ulp_iomux_setup_pad()
44 __raw_writel(((mux_mode << IOMUXC_PCR_MUX_ALT_SHIFT) & in mx7ulp_iomux_setup_pad()
52 __raw_writel(((mux_mode << IOMUXC_PCR_MUX_ALT_SHIFT) & in mx7ulp_iomux_setup_pad()
/external/u-boot/drivers/pinctrl/nxp/
Dpinctrl-imx.c25 int mux_reg, conf_reg, input_reg, input_val, mux_mode, config_val; in imx_pinctrl_set_state() local
86 mux_mode = pin_data[j++]; in imx_pinctrl_set_state()
92 mux_reg, conf_reg, input_reg, mux_mode, input_val, in imx_pinctrl_set_state()
96 mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_set_state()
103 mux_mode << mux_shift); in imx_pinctrl_set_state()
105 writel(mux_mode, info->base + mux_reg); in imx_pinctrl_set_state()
109 mux_mode); in imx_pinctrl_set_state()
/external/u-boot/arch/arm/mach-imx/
Diomux-v3.c24 u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; in imx_iomux_v3_setup_pad() local
47 mux_mode &= ~IOMUX_CONFIG_LPSR; in imx_iomux_v3_setup_pad()
56 mux_mode &= ~IOMUX_CONFIG_LPSR; in imx_iomux_v3_setup_pad()
63 __raw_writel(mux_mode, base + mux_ctrl_ofs); in imx_iomux_v3_setup_pad()
70 __raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl, in imx_iomux_v3_setup_pad()
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Diomux.h61 #define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \ argument
64 ((iomux_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \
/external/u-boot/arch/arm/include/asm/mach-imx/
Diomux-v3.h68 #define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \ argument
71 ((iomux_v3_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \