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Searched refs:qadd16 (Results 1 – 25 of 33) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumbv8m.s25 qadd16 r0, r0, r0 label
Dbasic-thumb2-instructions.s1903 qadd16 r1, r2, r3
1911 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]
Dbasic-arm-instructions.s1791 qadd16 r1, r2, r3
1798 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
/external/llvm/test/MC/ARM/
Dthumbv8m.s25 qadd16 r0, r0, r0 label
Dbasic-arm-instructions.s1789 qadd16 r1, r2, r3
1796 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
Dbasic-thumb2-instructions.s1855 qadd16 r1, r2, r3
1863 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dacle-intrinsics.ll172 define i32 @qadd16(i32 %a, i32 %b) nounwind {
173 ; CHECK-LABEL: qadd16
174 ; CHECK: qadd16 r0, r0, r1
175 %tmp = call i32 @llvm.arm.qadd16(i32 %a, i32 %b)
446 declare i32 @llvm.arm.qadd16(i32, i32) nounwind
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-a32.cc54 M(qadd16) \
Dtest-assembler-cond-rd-rn-rm-t32.cc53 M(qadd16) \
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs492 0x13,0x1f,0x22,0xe6 = qadd16 r1, r2, r3
Dbasic-thumb2-instructions.s.cs585 0x92,0xfa,0x13,0xf1 = qadd16 r1, r2, r3
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1182 qadd16 r1, r2, r3
1189 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
Dbasic-thumb2-instructions.s1428 qadd16 r1, r2, r3
1436 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]
/external/vixl/src/aarch32/
Dassembler-aarch32.h2827 void qadd16(Condition cond, Register rd, Register rn, Register rm);
2828 void qadd16(Register rd, Register rn, Register rm) { qadd16(al, rd, rn, rm); } in qadd16() function
Ddisasm-aarch32.h990 void qadd16(Condition cond, Register rd, Register rn, Register rm);
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1018 # CHECK: qadd16 r1, r2, r3
Dthumb2.txt1228 # CHECK: qadd16 r1, r2, r3
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1367 # CHECK: qadd16 r1, r2, r3
Dbasic-arm-instructions.txt1135 # CHECK: qadd16 r1, r2, r3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1135 # CHECK: qadd16 r1, r2, r3
Dthumb2.txt1367 # CHECK: qadd16 r1, r2, r3
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td1933 def t2QADD16 : T2I_pam<0b001, 0b0001, "qadd16">;
DARMInstrInfo.td3173 def QADD16 : AAI<0b01100010, 0b11110001, "qadd16">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td2200 def t2QADD16 : T2I_pam_intrinsics<0b001, 0b0001, "qadd16", int_arm_qadd16>;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2138 def t2QADD16 : T2I_pam<0b001, 0b0001, "qadd16">;

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