| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 93 define i32 @sadd8(i32 %a, i32 %b) nounwind {
94 ; CHECK-LABEL: sadd8
95 ; CHECK: sadd8 r0, r0, r1
96 %tmp = call i32 @llvm.arm.sadd8(i32 %a, i32 %b)
434 declare i32 @llvm.arm.sadd8(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 94 M(sadd8) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 93 M(sadd8) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 656 0x84,0xfa,0x08,0xf3 = sadd8 r3, r4, r8
692 0x82,0xfa,0x03,0xf1 = sadd8 r1, r2, r3
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| D | basic-arm-instructions.s.cs | 595 0x93,0x1f,0x12,0xe6 = sadd8 r1, r2, r3
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 1648 sadd8 r3, r4, r8
1652 @ CHECK: sadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x08,0xf3]
1761 sadd8 r1, r2, r3
1767 @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x03,0xf1]
|
| D | basic-arm-instructions.s | 1430 sadd8 r1, r2, r3
1435 @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xe6]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2131 sadd8 r3, r4, r8
2135 @ CHECK: sadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x08,0xf3]
2244 sadd8 r1, r2, r3
2250 @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x03,0xf1]
|
| D | basic-arm-instructions.s | 2174 sadd8 r1, r2, r3
2179 @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xe6]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2083 sadd8 r3, r4, r8
2087 @ CHECK: sadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x08,0xf3]
2196 sadd8 r1, r2, r3
2202 @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x03,0xf1]
|
| D | basic-arm-instructions.s | 2172 sadd8 r1, r2, r3
2177 @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1446 # CHECK: sadd8 r3, r4, r8
1553 # CHECK: sadd8 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1262 # CHECK: sadd8 r1, r2, r3
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1585 # CHECK: sadd8 r3, r4, r8
1692 # CHECK: sadd8 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1419 # CHECK: sadd8 r1, r2, r3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1585 # CHECK: sadd8 r3, r4, r8
1692 # CHECK: sadd8 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1419 # CHECK: sadd8 r1, r2, r3
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2975 void sadd8(Condition cond, Register rd, Register rn, Register rm);
2976 void sadd8(Register rd, Register rn, Register rm) { sadd8(al, rd, rn, rm); } in sadd8() function
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| D | disasm-aarch32.h | 1050 void sadd8(Condition cond, Register rd, Register rn, Register rm);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1957 def t2SADD8 : T2I_pam<0b000, 0b0000, "sadd8">;
|
| D | ARMInstrInfo.td | 3190 def SADD8 : AAI<0b01100001, 0b11111001, "sadd8">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2230 def t2SADD8 : T2I_pam_intrinsics<0b000, 0b0000, "sadd8", int_arm_sadd8>;
|
| D | ARMInstrInfo.td | 3736 def SADD8 : AAIIntrinsic<0b01100001, 0b11111001, "sadd8", int_arm_sadd8>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2162 def t2SADD8 : T2I_pam<0b000, 0b0000, "sadd8">;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7750 "\003rrx\003rsb\003rsc\006sadd16\005sadd8\004sasx\003sbc\004sbfx\004sdiv"
8612 …{ 803 /* sadd8 */, ARM::t2SADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Fe…
8613 …{ 803 /* sadd8 */, ARM::SADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_…
|