Searched refs:sh_mmcif_read (Results 1 – 2 of 2) sorted by relevance
29 state = sh_mmcif_read(&host->regs->ce_int); in sh_mmcif_intr()30 state &= sh_mmcif_read(&host->regs->ce_int_mask); in sh_mmcif_intr()40 if (sh_mmcif_read(&host->regs->ce_cmd_set) & CMD_SET_RBSY) in sh_mmcif_intr()126 tmp = sh_mmcif_read(&host->regs->ce_clk_ctrl) & (CLK_ENABLE | in sh_mmcif_sync_reset()145 state1 = sh_mmcif_read(&host->regs->ce_host_sts1); in sh_mmcif_error_manage()146 state2 = sh_mmcif_read(&host->regs->ce_host_sts2); in sh_mmcif_error_manage()148 DRIVER_NAME, sh_mmcif_read(&host->regs->ce_host_sts1)); in sh_mmcif_error_manage()150 DRIVER_NAME, sh_mmcif_read(&host->regs->ce_host_sts2)); in sh_mmcif_error_manage()163 if (!(sh_mmcif_read(&host->regs->ce_host_sts1) in sh_mmcif_error_manage()202 sh_mmcif_read(&host->regs->ce_block_set)) + 3; in sh_mmcif_single_read()[all …]
220 static inline u32 sh_mmcif_read(unsigned long *reg) in sh_mmcif_read() function232 sh_mmcif_write(val | sh_mmcif_read(reg), reg); in sh_mmcif_bitset()237 sh_mmcif_write(~val & sh_mmcif_read(reg), reg); in sh_mmcif_bitclr()