| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | dsp-mlal.ll | 61 ; CHECK: smmlsr r0, {{(r1, r2|r2, r1)}}, r0
63 ; NODSP-NOT: smmlsr
79 ; CHECK-NOT: smmlsr
81 ; NODSP-NOT: smmlsr
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 686 0xf3,0x12,0x54,0xe7 = smmlsr r4, r3, r2, r1
|
| D | basic-thumb2-instructions.s.cs | 765 0x63,0xfb,0x12,0x14 = smmlsr r4, r3, r2, r1
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1733 smmlsr r4, r3, r2, r1
1738 @ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0xf3,0x12,0x54,0xe7]
|
| D | basic-thumb2-instructions.s | 1985 smmlsr r4, r3, r2, r1
1991 @ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0x63,0xfb,0x12,0x14]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3189 void smmlsr(
3191 void smmlsr(Register rd, Register rn, Register rm, Register ra) { in smmlsr() function
3192 smmlsr(al, rd, rn, rm, ra); in smmlsr()
|
| D | disasm-aarch32.h | 1154 void smmlsr(
|
| D | disasm-aarch32.cc | 2721 void Disassembler::smmlsr( in smmlsr() function in vixl::aarch32::Disassembler
22039 smmlsr(CurrentCond(), in DecodeT32()
64368 smmlsr(condition, in DecodeA32()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2468 smmlsr r4, r3, r2, r1
2474 @ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0x63,0xfb,0x12,0x14]
|
| D | basic-arm-instructions.s | 2508 smmlsr r4, r3, r2, r1
2513 @ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0xf3,0x12,0x54,0xe7]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2506 smmlsr r4, r3, r2, r1
2511 @ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0xf3,0x12,0x54,0xe7]
|
| D | basic-thumb2-instructions.s | 2420 smmlsr r4, r3, r2, r1
2426 @ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0x63,0xfb,0x12,0x14]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1562 # CHECK: smmlsr r4, r3, r2, r1
|
| D | thumb2.txt | 1764 # CHECK: smmlsr r4, r3, r2, r1
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1903 # CHECK: smmlsr r4, r3, r2, r1
|
| D | basic-arm-instructions.txt | 1714 # CHECK: smmlsr r4, r3, r2, r1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1714 # CHECK: smmlsr r4, r3, r2, r1
|
| D | thumb2.txt | 1903 # CHECK: smmlsr r4, r3, r2, r1
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2430 "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
|
| D | ARMInstrInfo.td | 3599 IIC_iMAC32, "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2703 def t2SMMLSR: T2FourRegSMMLA<0b110, 0b0001, "smmlsr",
|
| D | ARMInstrInfo.td | 4206 IIC_iMAC32, "smmlsr", "\t$Rd, $Rn, $Rm, $Ra",
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2662 "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
|
| D | ARMInstrInfo.td | 4014 IIC_iMAC32, "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7757 "ar\005smmls\006smmlsr\005smmul\006smmulr\005smuad\006smuadx\006smulbb\006"
8719 …{ 1136 /* smmlsr */, ARM::t2SMMLSR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_…
8720 …{ 1136 /* smmlsr */, ARM::SMMLSR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_Is…
|