| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 328 SpecialRegister spec_reg);
330 Condition cond, MaskedSpecialRegister spec_reg, const Operand& operand);
584 SpecialFPRegister spec_reg);
586 SpecialFPRegister spec_reg,
2665 void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
2666 void mrs(Register rd, SpecialRegister spec_reg) { mrs(al, rd, spec_reg); } in mrs() argument
2669 MaskedSpecialRegister spec_reg,
2671 void msr(MaskedSpecialRegister spec_reg, const Operand& operand) { in msr() argument
2672 msr(al, spec_reg, operand); in msr()
4980 void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
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| D | macro-assembler-aarch32.cc | 2240 MaskedSpecialRegister spec_reg, in Delegate() argument
2252 msr(cond, spec_reg, scratch); in Delegate()
2255 Assembler::Delegate(type, instruction, cond, spec_reg, operand); in Delegate()
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| D | disasm-aarch32.h | 927 void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
930 MaskedSpecialRegister spec_reg,
2033 void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
2035 void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt);
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| D | macro-assembler-aarch32.h | 972 MaskedSpecialRegister spec_reg,
2552 void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) { in Mrs() argument
2558 mrs(cond, rd, spec_reg); in Mrs()
2560 void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); } in Mrs() argument
2563 MaskedSpecialRegister spec_reg, in Msr() argument
2570 msr(cond, spec_reg, operand); in Msr()
2572 void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) { in Msr() argument
2573 Msr(al, spec_reg, operand); in Msr()
7910 SpecialFPRegister spec_reg) { in Vmrs() argument
7916 vmrs(cond, rt, spec_reg); in Vmrs()
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| D | disasm-aarch32.cc | 1949 void Disassembler::mrs(Condition cond, Register rd, SpecialRegister spec_reg) { in mrs() argument
1952 << ", " << spec_reg; in mrs()
1956 MaskedSpecialRegister spec_reg, in msr() argument
1960 << spec_reg << ", " << operand; in msr()
5351 SpecialFPRegister spec_reg) { in vmrs() argument
5354 << ", " << spec_reg; in vmrs()
5358 SpecialFPRegister spec_reg, in vmsr() argument
5362 << spec_reg << ", " << rt; in vmsr()
9487 unsigned spec_reg = ((instr >> 8) & 0xf) | in DecodeT32() local
9492 MaskedSpecialRegister(spec_reg), in DecodeT32()
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| D | assembler-aarch32.cc | 7384 void Assembler::mrs(Condition cond, Register rd, SpecialRegister spec_reg) { in mrs() argument
7390 EmitT32_32(0xf3ef8000U | (rd.GetCode() << 8) | (spec_reg.GetReg() << 20)); in mrs()
7398 (spec_reg.GetReg() << 22)); in mrs()
7402 Delegate(kMrs, &Assembler::mrs, cond, rd, spec_reg); in mrs()
7406 MaskedSpecialRegister spec_reg, in msr() argument
7417 ((spec_reg.GetReg() & 0xf) << 16) | in msr()
7418 ((spec_reg.GetReg() & 0x10) << 18) | in msr()
7429 EmitT32_32(0xf3808000U | ((spec_reg.GetReg() & 0xf) << 8) | in msr()
7430 ((spec_reg.GetReg() & 0x10) << 16) | (rn.GetCode() << 16)); in msr()
7438 ((spec_reg.GetReg() & 0xf) << 16) | in msr()
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