| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-v128_lo-diagnostics.s | 10 sqdmull2 v0.4h, v1.8h, v16.h[0]
|
| D | neon-2velem.s | 250 sqdmull2 v0.4s, v1.8h, v2.h[2]
251 sqdmull2 v0.2d, v1.4s, v2.s[2]
252 sqdmull2 v0.2d, v1.4s, v22.s[2]
|
| D | neon-3vdiff.s | 275 sqdmull2 v0.4s, v1.8h, v2.8h
276 sqdmull2 v0.2d, v1.4s, v2.4s
|
| D | neon-diagnostics.s | 2529 sqdmull2 v0.4s, v1.8s, v2.8h
2530 sqdmull2 v0.2d, v1.4d, v2.4s
2539 sqdmull2 v0.8h, v1.16b, v2.16b
3529 sqdmull2 v0.4h, v1.8h, v2.h[2]
3530 sqdmull2 v0.4s, v1.8h, v2.h[8]
3531 sqdmull2 v0.4s, v1.8h, v16.h[4]
3532 sqdmull2 v0.2s, v1.4s, v2.s[2]
3533 sqdmull2 v0.2d, v1.4s, v2.s[4]
3534 sqdmull2 v0.2d, v1.4s, v22.s[4]
|
| D | arm64-advsimd.s | 1254 sqdmull2.4s v0, v0, v0[1]
1256 sqdmull2.2d v0, v0, v0[3]
1323 ; CHECK: sqdmull2.4s v0, v0, v0[1] ; encoding: [0x00,0xb0,0x50,0x4f]
1325 ; CHECK: sqdmull2.2d v0, v0, v0[3] ; encoding: [0x00,0xb8,0xa0,0x4f]
2042 sqdmull2 v10.4s, v13.8h, v13.8h
2044 sqdmull2 v10.2d, v13.4s, v13.4s
2046 ; CHECK: sqdmull2.4s v10, v13, v13 ; encoding: [0xaa,0xd1,0x6d,0x4e]
2048 ; CHECK: sqdmull2.2d v10, v13, v13 ; encoding: [0xaa,0xd1,0xad,0x4e]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-v128_lo-diagnostics.s | 10 sqdmull2 v0.4h, v1.8h, v16.h[0]
|
| D | neon-2velem.s | 250 sqdmull2 v0.4s, v1.8h, v2.h[2]
251 sqdmull2 v0.2d, v1.4s, v2.s[2]
252 sqdmull2 v0.2d, v1.4s, v22.s[2]
|
| D | neon-3vdiff.s | 275 sqdmull2 v0.4s, v1.8h, v2.8h
276 sqdmull2 v0.2d, v1.4s, v2.4s
|
| D | neon-diagnostics.s | 2568 sqdmull2 v0.4s, v1.8s, v2.8h
2569 sqdmull2 v0.2d, v1.4d, v2.4s
2580 sqdmull2 v0.8h, v1.16b, v2.16b
3589 sqdmull2 v0.4h, v1.8h, v2.h[2]
3590 sqdmull2 v0.4s, v1.8h, v2.h[8]
3591 sqdmull2 v0.4s, v1.8h, v16.h[4]
3592 sqdmull2 v0.2s, v1.4s, v2.s[2]
3593 sqdmull2 v0.2d, v1.4s, v2.s[4]
3594 sqdmull2 v0.2d, v1.4s, v22.s[4]
|
| D | arm64-advsimd.s | 1254 sqdmull2.4s v0, v0, v0[1]
1256 sqdmull2.2d v0, v0, v0[3]
1323 ; CHECK: sqdmull2.4s v0, v0, v0[1] ; encoding: [0x00,0xb0,0x50,0x4f]
1325 ; CHECK: sqdmull2.2d v0, v0, v0[3] ; encoding: [0x00,0xb8,0xa0,0x4f]
2042 sqdmull2 v10.4s, v13.8h, v13.8h
2044 sqdmull2 v10.2d, v13.4s, v13.4s
2046 ; CHECK: sqdmull2.4s v10, v13, v13 ; encoding: [0xaa,0xd1,0x6d,0x4e]
2048 ; CHECK: sqdmull2.2d v10, v13, v13 ; encoding: [0xaa,0xd1,0xad,0x4e]
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-2velem.s.cs | 99 0x20,0xb0,0x62,0x4f = sqdmull2 v0.4s, v1.8h, v2.h[2]
100 0x20,0xb8,0x82,0x4f = sqdmull2 v0.2d, v1.4s, v2.s[2]
101 0x20,0xb8,0x96,0x4f = sqdmull2 v0.2d, v1.4s, v22.s[2]
|
| D | neon-3vdiff.s.cs | 96 0x20,0xd0,0x62,0x4e = sqdmull2 v0.4s, v1.8h, v2.8h
97 0x20,0xd0,0xa2,0x4e = sqdmull2 v0.2d, v1.4s, v2.4s
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-2velem-high.ll | 107 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
122 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
133 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
146 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
|
| D | arm64-vmul.ll | 86 ;CHECK: sqdmull2.4s
97 ;CHECK: sqdmull2.2d
877 ;CHECK: sqdmull2.4s
889 ;CHECK: sqdmull2.2d
1785 ; CHECK: sqdmull2.2d
1810 ; CHECK: sqdmull2.2d
1848 ; CHECK: sqdmull2.2d
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-2velem-high.ll | 107 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
122 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
133 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
146 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
|
| /external/v8/src/arm64/ |
| D | simulator-logic-arm64.cc | 853 LogicVRegister Simulator::sqdmull2(VectorFormat vform, LogicVRegister dst, in sqdmull2() function in v8::internal::Simulator
859 return sqdmull2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmull2()
2686 LogicVRegister product = sqdmull2(vform, temp, src1, src2); in sqdmlal2()
2702 LogicVRegister product = sqdmull2(vform, temp, src1, src2); in sqdmlsl2()
2714 LogicVRegister Simulator::sqdmull2(VectorFormat vform, LogicVRegister dst, in sqdmull2() function in v8::internal::Simulator
|
| D | macro-assembler-arm64.h | 255 V(sqdmull2, Sqdmull2) \
455 V(sqdmull2, Sqdmull2) \
|
| D | simulator-arm64.h | 1506 LogicVRegister sqdmull2(VectorFormat vform, LogicVRegister dst,
1868 V(sqdmull2)
|
| D | assembler-arm64.h | 1834 void sqdmull2(const VRegister& vd, const VRegister& vn, const VRegister& vm,
1905 void sqdmull2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 813 LogicVRegister Simulator::sqdmull2(VectorFormat vform, in sqdmull2() function in vixl::aarch64::Simulator
821 return sqdmull2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmull2()
3289 LogicVRegister product = sqdmull2(vform, temp, src1, src2); in sqdmlal2()
3309 LogicVRegister product = sqdmull2(vform, temp, src1, src2); in sqdmlsl2()
3324 LogicVRegister Simulator::sqdmull2(VectorFormat vform, in sqdmull2() function in vixl::aarch64::Simulator
|
| D | simulator-aarch64.h | 2076 LogicVRegister sqdmull2(VectorFormat vform,
2782 V(sqdmull2)
|
| D | assembler-aarch64.h | 2560 void sqdmull2(const VRegister& vd,
3291 void sqdmull2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1344 0x~~~~~~~~~~~~~~~~ 4ea2d1dc sqdmull2 v28.2d, v14.4s, v2.4s
1345 0x~~~~~~~~~~~~~~~~ 4f8dbb01 sqdmull2 v1.2d, v24.4s, v13.s[2]
1346 0x~~~~~~~~~~~~~~~~ 4e7fd22b sqdmull2 v11.4s, v17.8h, v31.8h
1347 0x~~~~~~~~~~~~~~~~ 4f7bb281 sqdmull2 v1.4s, v20.8h, v11.h[3]
|
| D | log-disasm-colour | 1344 0x~~~~~~~~~~~~~~~~ 4ea2d1dc sqdmull2 v28.2d, v14.4s, v2.4s
1345 0x~~~~~~~~~~~~~~~~ 4f8dbb01 sqdmull2 v1.2d, v24.4s, v13.s[2]
1346 0x~~~~~~~~~~~~~~~~ 4e7fd22b sqdmull2 v11.4s, v17.8h, v31.8h
1347 0x~~~~~~~~~~~~~~~~ 4f7bb281 sqdmull2 v1.4s, v20.8h, v11.h[3]
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1577 __ sqdmull2(v28.V2D(), v14.V4S(), v2.V4S()); in GenerateTestSequenceNEON() local
1578 __ sqdmull2(v1.V2D(), v24.V4S(), v13.S(), 2); in GenerateTestSequenceNEON() local
1579 __ sqdmull2(v11.V4S(), v17.V8H(), v31.V8H()); in GenerateTestSequenceNEON() local
1580 __ sqdmull2(v1.V4S(), v20.V8H(), v11.H(), 3); in GenerateTestSequenceNEON() local
|