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Searched refs:tRFC (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun9i.c115 u32 tRFC; /* in ns */ member
376 const u32 tRFC = NS2CYCLES_ROUNDUP(para->tRFC); in mctl_channel_init() local
569 writel((MCTL_DIV32(tREFI) << 16) | (MCTL_DIV2(tRFC) << 0), in mctl_channel_init()
645 (tRFC << 11) | (tWLMRD << 20) | (tWLO << 26), in mctl_channel_init()
885 .tRFC = 260, /* 260ns for 4GBit devices */ in sunxi_dram_init()
Ddram_sun4i.c432 u32 tRFC, tREFI; in dramc_set_autorefresh_cycle() local
434 tRFC = (tRFC_DDR3_table[density] * clk + 999) / 1000; in dramc_set_autorefresh_cycle()
437 writel(DRAM_DRR_TREFI(tREFI) | DRAM_DRR_TRFC(tRFC), &dram->drr); in dramc_set_autorefresh_cycle()
/external/u-boot/board/freescale/mx6memcal/
DKconfig220 0 == 1 refresh (tRFC)
221 7 == 8 refreshes (tRFC*8)
/external/u-boot/board/tbs/tbs2910/
Dtbs2910.cfg79 /* tRFC=0x89+1,tXS=0x8e+1,tXP=3+1,tXPDLL=0xc+1,tFAW=0x17+1,tCL=0x4+3 */
/external/u-boot/board/buffalo/lsxl/
Dkwbimage-lschl.cfg67 # bit6-0: 0x23, 35 cycle tRFC
Dkwbimage-lsxhl.cfg67 # bit6-0: 0x32, 50 cycle tRFC
/external/u-boot/board/d-link/dns325/
Dkwbimage.cfg63 # bit6-0: 0x33, 33 cycle tRFC